Semiconductor memory device and method of fabricating the same
US-2017084613-A1 · Mar 23, 2017 · US
US11508525B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11508525-B2 |
| Application number | US-202016819404-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 16, 2020 |
| Priority date | Mar 6, 2018 |
| Publication date | Nov 22, 2022 |
| Grant date | Nov 22, 2022 |
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A capacitor according to an embodiment includes a substrate having a first surface and a second surface and provided with one or more first through holes each extending from the first surface to the second surface, a first conductive layer covering the first surface, the second surface, and side walls of the one or more first through holes, a second conductive layer facing the first surface, the second surface, and the side walls of the one or more first through holes, with the first conductive layer interposed therebetween, and a dielectric layer interposed between the first conductive layer and the second conductive layer.
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The invention claimed is: 1. A capacitor comprising: a substrate having a first surface and a second surface and provided with one or more first through holes each extending from the first surface to the second surface; a first conductive layer covering the first surface, the second surface, and side walls of the one or more first through holes; a second conductive layer facing the first surface, the second surface, and the side walls of the one or more first through holes, with the first conductive layer interposed therebetween; and a dielectric layer interposed between the first conductive layer and the second conductive layer, wherein the first surface and the second surface are first and second main surfaces perpendicular to a thickness direction of the substrate, respectively, and the one or more first through holes are one or more through holes each extending in the thickness direction, wherein one or more first trenches are provided on the first main surface, one or more second trenches are provided on the second main surface, a length direction of the one or more first trenches and a length direction of the one or more second trenches intersect each other, and the one or more first trenches and the one or more second trenches are connected to each other to form the one or more first through holes, and wherein the first conductive layer further covers side walls and bottom surfaces of the one or more first trenches and side walls and bottom surfaces of the one or more second trenches, and the second conductive layer further faces the side walls and the bottom surfaces of the one or more first trenches and the side walls and the bottom surfaces of the one or more second trenches, with the first conductive layer interposed therebetween. 2. The capacitor according to claim 1 , wherein a sum of a depth of each of the one or more first trenches and a depth of each of the one or more second trenches is equal to or greater than a thickness of the substrate. 3. The capacitor according to claim 1 , wherein the one or more first trenches and the one or more second trenches form the one or more first through holes at positions where the one or more first trenches and the one or more second trenches intersect. 4. The capacitor according to claim 1 , further comprising: an insulating layer facing the first main surface with a portion of the first conductive layer, a portion of the second conductive layer, and a portion of the dielectric layer interposed therebetween, a first electrode provided on the insulating layer and electrically connected to the first conductive layer; and a second electrode provided on the insulating layer and electrically connected to the second conductive layer. 5. A capacitor, comprising: a substrate having a first surface and a second surface and provided with one or more first through holes each extending from the first surface to the second surface; a first conductive layer covering the first surface, the second surface, and side walls of the one or more first through holes; a second conductive layer facing the first surface, the second surface, and the side walls of the one or more first through holes, with the first conductive layer interposed therebetween; and a dielectric layer interposed between the first conductive layer and the second conductive layer, wherein the first surface and the second surface are first and second main surfaces perpendicular to a thickness direction of the substrate, respectively, and the one or more first through holes are one or more through holes each extending in the thickness direction, wherein one or more first trenches are provided on the first main surface, one or more second trenches are provided on the second main surface, a length direction of the one or more first trenches and a length direction of the one or more second trenches intersect each other, and the one or more first trenches and the one or more second trenches are connected to each other to form the one or more first through holes, and wherein the one or more first trenches are a plurality of first trenches, one or more portions of the substrate each sandwiched between two adjacent ones of the plurality of first trenches are provided with one or more second through holes connecting one of the two adjacent first trenches to the other, the first conductive layer further covers side walls of the one or more second through holes, and the second conductive layer further faces the side walls of the one or more second through holes with the first conductive layer interposed therebetween. 6. The capacitor according to claim 5 , further comprising: an insulating layer facing the first main surface with a portion of the first conductive layer, a portion of the second conductive layer, and a portion of the dielectric layer interposed therebetween; a first electrode provided on the insulating layer and electrically connected to the first conductive layer; and a second electrode provided on the insulating layer and electrically connected to the second conductive layer. 7. A capacitor, comprising: a substrate having a first surface and a second surface and provided with one or more first through holes each extending from the first surface to the second surface; a first conductive layer covering the first surface, the second surface, and side walls of the one or more first through holes; a second conductive layer facing the first surface, the second surface, and the side walls of the one or more first through holes, with the first conductive layer interposed therebetween; and a dielectric layer interposed between the first conductive layer and the second conductive layer, wherein the first surface and the second surface are first and second main surfaces perpendicular to a thickness direction of the substrate, respectively, and the one or more first through holes are one or more through holes each extending in the thickness direction, wherein one or more first trenches are provided on the first main surface, one or more second trenches are provided on the second main surface, a length direction of the one or more first trenches and a length direction of the one or more second trenches intersect each other, and the one or more first trenches and the one or more second trenches are connected to each other to form the one or more first through holes, and wherein the one or more second trenches are a plurality of second trenches, one or more portions of the substrate each sandwiched between two adjacent ones of the plurality of second trenches are provided with one or more third through holes connecting one of the two adjacent second trenches to the other, the first conductive layer further covers side walls of the one or more third through holes, and the second conductive layer further faces the side walls of the one or more third through holes with the first conductive layer interposed therebetween. 8. The capacitor according to claim 7 , further comprising: an insulating layer facing the first main surface with a portion of the first conductive layer, a portion of the second conductive layer, and a portion of the dielectric layer interposed therebetween; a first electrode provided on the insulating layer and electrically connected to the first conductive layer; and a second electrode provided on the insulating layer and electrically connected to the second conductive layer.
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