Pixel circuit, pixel driving method and display device

Patent metadata

Field	Value
Publication number	US-11508294-B2
Application number	US-202117530101-A
Country	US
Kind code	B2
Filing date	Nov 18, 2021
Priority date	Mar 15, 2021
Publication date	Nov 22, 2022
Grant date	Nov 22, 2022

Abstract

The present application provides a pixel circuit, a pixel driving method and a display device. The pixel circuit is to be coupled to a to-be-driven element. The pixel circuit includes a first energy storage circuit, a driving circuit, a light-emitting control circuit, a data writing circuit, and a compensation control circuit. The compensation control circuit is configured to, under control of a third control signal, control conduction between the first node and the first terminal of the driving circuit, and control conduction between the second node and the second terminal of the driving circuit.

First claim

What is claimed is:

1. A pixel circuit configured to be coupled to a to-be-driven element, comprising:
a first energy storage circuit;
a driving circuit;
a light-emitting control circuit;
a data writing circuit; and
a compensation control circuit;
wherein a first terminal of the first energy storage circuit is electrically coupled to a first node; a second terminal of the first energy storage circuit is electrically coupled to a second node; the first energy storage circuit is configured to store electric energy; the first node is electrically coupled to a control terminal of the driving circuit;
the light-emitting control circuit is respectively coupled to a first control terminal, a second control terminal, a first terminal of the driving circuit, a second terminal of the driving circuit, a first terminal of the to-be-driven element and a first voltage terminal; the light-emitting control circuit is configured to, control conduction between the first terminal of the to-be-driven element and the first terminal of the driving circuit under control of a first control signal provided by the first control terminal, and control conduction between the second terminal of the driving circuit and the first voltage terminal under control of a second control signal provided by the second control terminal; the second terminal of the to-be-driven element is electrically coupled to a second voltage terminal;
the compensation control circuit is electrically coupled to a third control terminal, the first node, the first terminal of the driving circuit, the second node and the second terminal of the driving circuit, respectively; the compensation control circuit is configured to, under control of a third control signal provided by the third control terminal, control conduction between the first node and the first terminal of the driving circuit, and control conduction between the second node and the second terminal of the driving circuit;
the data writing circuit is electrically coupled to a fourth control terminal, a data line and the second node, respectively; the data writing circuit is configured to, under control of a fourth control signal provided by the fourth control terminal, control writing a data voltage provided by the data line into the second node; and
the driving circuit is configured to, under control of a potential of the control terminal of the driving circuit, generate a driving current.

2. The pixel circuit of claim 1 , further comprising a second energy storage circuit; wherein a first terminal of the second energy storage circuit is electrically coupled to the second node; a second terminal of the second energy storage circuit is electrically coupled to a third voltage terminal; and the second energy storage circuit is configured to store electrical energy.

3. The pixel circuit of claim 1 , wherein the compensation control circuit includes a first transistor and a second transistor;
a control terminal of the first transistor is electrically coupled to the third control terminal; a first terminal of the first transistor is electrically coupled to the second node; a second terminal of the first transistor is electrically coupled to the second terminal of the driving circuit;
a control terminal of the second transistor is electrically coupled to the third control terminal; a first terminal of the second transistor is electrically coupled to the first node; a second terminal of the second transistor is electrically coupled to the first terminal of the driving circuit.

4. The pixel circuit of claim 1 , wherein the light-emitting control circuit includes a third transistor and a fourth transistor;
a control terminal of the third transistor is electrically coupled to the first control terminal; a first terminal of the third transistor is electrically coupled to the first terminal of the to-be-driven element; a second terminal of the third transistor is electrically coupled to the first terminal of the driving circuit;
a control terminal of the fourth transistor is electrically coupled to the second control terminal; a first terminal of the fourth transistor is electrically coupled to the second terminal of the driving circuit; a second terminal of the fourth transistor is electrically coupled to the first voltage terminal.

5. The pixel circuit of claim 1 , wherein the data writing circuit includes a fifth transistor; a control terminal of the fifth transistor is electrically coupled to the fourth control terminal; a first terminal of the fifth transistor is electrically coupled to the data line; a second terminal of the fifth transistor is electrically coupled to the second node.

6. The pixel circuit of claim 5 , wherein the driving circuit includes a driving transistor; the first energy storage circuit includes a first storage capacitor; and the second energy storage circuit includes a second storage capacitor;
a control terminal of the driving transistor is the control terminal of the driving circuit; a first terminal of the driving transistor is the first terminal of the driving circuit; a second terminal of the driving transistor is the second terminal of the driving circuit;
a first terminal of the first storage capacitor is electrically coupled to the first node; a second terminal of the first storage capacitor is electrically coupled to the second node;
a first terminal of the second storage capacitor is electrically coupled to the second node; a second terminal of the second storage capacitor is electrically coupled to the third voltage terminal.

7. The pixel circuit of claim 6 , wherein the compensation control circuit includes a first transistor and a second transistor;
a control terminal of the first transistor is electrically coupled to the third control terminal; a first terminal of the first transistor is electrically coupled to the second node; a second terminal of the first transistor is electrically coupled to the second terminal of the driving circuit;
a control terminal of the second transistor is electrically coupled to the third control terminal; a first terminal of the second transistor is electrically coupled to the first node; a second terminal of the second transistor is electrically coupled to the first terminal of the driving circuit.

8. The pixel circuit of claim 7 , wherein the light-emitting control circuit includes a third transistor and a fourth transistor;
a control terminal of the third transistor is electrically coupled to the first control terminal; a first terminal of the third transistor is electrically coupled to the first terminal of the to-be-driven element; a second terminal of the third transistor is electrically coupled to the first terminal of the driving circuit;
a control terminal of the fourth transistor is electrically coupled to the second control terminal; a first terminal of the fourth transistor is electrically coupled to the second terminal of the driving circuit; a second terminal of the fourth transistor is electrically coupled to the first voltage terminal.

9. The pixel circuit of claim 8 , wherein the data writing circuit includes a fifth transistor; a control terminal of the fifth transistor is electrically coupled to the fourth control terminal; a first terminal of the fifth transistor is electrically coupled to the data line; a second terminal of the fifth transistor is electrically coupled to the second node.

10. The pixel circuit of claim 1 , wherein the to-be-driven element is a micro light-emitting diode.

11. The pixel circuit of claim 1 , wherein the compensation control circuit includes a first transistor and a second transistor; the light-emitting control circuit includes a third transistor and a fourth transistor;

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Technology Dev Co Ltd

Inventors

• Zhao Jiao
• Han Seungwoo
• Zheng Haoliang
• Xuan Minghua
• Xiao Li
• Liu Dongni
• Chen Liang
• Chen Hao

Classifications

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G3/32 Primary

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title