Information processing apparatus, image recognition apparatus, and parameter setting method for convolutional neural network

Patent metadata

Field	Value
Publication number	US-11507797-B2
Application number	US-201815881056-A
Country	US
Kind code	B2
Filing date	Jan 26, 2018
Priority date	Feb 27, 2017
Publication date	Nov 22, 2022
Grant date	Nov 22, 2022

Abstract

An information processing apparatus having an input device for receiving data, an operation unit for constituting a convolutional neural network for processing data, a storage area for storing data to be used by the operation unit and an output device for outputting a result of the processing. The convolutional neural network is provided with a first intermediate layer for performing a first processing including a first inner product operation and a second intermediate layer for performing a second processing including a second inner product operation, and is configured so that the bit width of first filter data for the first inner product operation and the bit width of second filter data for the second inner product operation are different from each other.

First claim

What is claimed is:

1. An information processing apparatus comprising:
an input device for receiving data;
an operation unit which constitutes a convolutional neural network that performs processing of the data;
a storage area for storing data to be used in the operation unit; and
an output device for outputting a result of the processing, wherein
the convolutional neural network includes:
a first intermediate layer for performing a first processing including a first inner product operation; and
a second intermediate layer for performing a second processing including a second inner product operation, wherein
a bit width of first filter data for the first inner product operation and a bit width of second filter data for the second inner product operation differ from each other,
wherein the storage area includes a filter data storage area, and the filter data storage area comprises:
a first area for storing the first filter data having a first bit width; and
a second area, different from the first area, for storing the second filter data having a second bit width,
a bank configuration and address allocation in the first area are same as a bank configuration and address allocation in the second area, and
the first bit width and the second bit width are different from each other,
wherein the operation unit is configured to:
learn all filter data of 32 bit single-precision floating-point numbers to generate learning data;
convert the all filter data to 32 bit fixed point numbers;
replace 32−n bits from least significant bits of the all filter data of the first intermediate layer with a zero, where n is an integer greater than 0; and
learn the all filter data again using the learning data after the 32−n bits from the least significant bits have been replaced with the zero.

2. The information processing apparatus according to claim 1 , wherein
the first intermediate layer is a convolution layer or a fully connected layer, and
the second intermediate layer is a convolution layer or a fully connected layer.

3. The information processing apparatus according to claim 1 , wherein
the storage area stores the bit width of the first filter data and the bit width of the second filter data.

4. The information processing apparatus according to claim 1 , wherein
the first intermediate layer has a larger number of parameters required for processing than the second intermediate layer, and
the bit width of the first filter data for the first inner product operation is larger than the bit width of the second filter data for the second inner product operation.

5. The information processing apparatus according to claim 1 , wherein
the first intermediate layer is located before the second intermediate layer, and
the bit width of the first filter data for the first inner product operation is larger than the bit width of the second filter data for the second inner product operation.

6. The information processing apparatus according to claim 1 , wherein
the first intermediate layer is a layer for detecting an object by using color information for image data, and the second intermediate layer is a layer for edge detection of an object for the image data, and
the bit width of the first filter data for the first inner product operation is larger than the bit width of the second filter data for the second inner product operation.

7. The information processing apparatus according to claim 1 , wherein
the information processing apparatus is configured by an FPGA,
the storage area is a semiconductor memory mounted on the FPGA, and
the operation unit is a programmable logic cell mounted on the FPGA.

8. An image recognition apparatus that classifies and identifies a type of an object in an image, the image recognition apparatus comprising:
an input device for receiving the image;
an operation unit for performing processing of the image;
a storage area for storing data to be used in the operation unit; and
an output device for outputting a result of the processing, wherein
the operation unit has a plurality of hierarchical layers for performing a convolutional operation of a filter for extracting a feature amount of the image, in order to process the image,
performs the convolutional operation in a subsequent hierarchical layer with respect to a result of the convolutional operation obtained in a previous hierarchical layer, and
determine data types of filter data to be used in the convolutional operation for each hierarchical layer so that the data types include at least two different data types, wherein
the storage area includes a filter data storage area for storing the filter data for each of the hierarchical layers,
a plurality of pieces of the filter data is stored in one address of the filter data storage area, and
a number of pieces of filter data stored in one address is not same for each hierarchical layer,
wherein the operation unit is configured to:
learn all filter data of 32 bit single-precision floating-point numbers to generate learning data;
convert the all filter data to 32 bit fixed point numbers;
replace 32−n bits from least significant bits of the all filter data of the previous hierarchical layer with a zero, where n is an integer greater than 0; and
learn the all filter data again using the learning data after the 32−n bits from the least significant bits have been replaced with the zero.

9. The image recognition apparatus according to claim 8 , wherein
the filter data is used by a common convolution operator,
the convolution operator has a plurality of registers of fixed size for storing the filter data,
stores a plurality of filter data used for the convolutional operation to be performed in one hierarchical layer in one-to-one correspondence with the plurality of registers, and
stores a plurality of filter data used for the convolutional operation to be performed in another hierarchical layer in one-to-one correspondence with the plurality of registers,
so as to allow the common convolution operator to function as a hierarchical layer for performing different convolutional operations.

10. A method for setting a parameter of a convolutional neural network which receives data, executes processing of the data, and outputs a result of the processing, the method comprising:
performing, by a first intermediate layer of the convolutional neural network, a first inner product operation;
performing, by a second intermediate layer of the convolutional neural network, a second inner product operation;
independently setting a first bit width of first filter data for the first inner product operation and a second bit width of second filter data for the second inner product operation;
storing the first filter data in a first storage area; and
storing the second filter data in a second storage area, different from the first storage area;
wherein a bank configuration and address allocation in the first storage area are same as a bank configuration and address allocation in the second storage area; and
wherein the first bit width and the second bit width are different from each others;
learning all filter data of 32 bit single-precision floating-point numbers to generate learning data;
converting the all filter data to 32 bit fixed point numbers;
replacing 32−n bits from least significant bits of the all filter data of the first intermediate layer with a zero, where n is an integer greater than 0; and
learning the all filter data again using the learning data after the 32−n bits from the least significant bits have been replaced with the zero.

11. The method for setting a parameter of a convolutional neural network according to cl

Assignees

• Hitachi Ltd

Inventors

• MOTOYA Toru
• Ono Goichi
• Toyoda Hidehiro

Classifications

• G06F18/245

  relating to the decision surface · CPC title

• G06F18/2193

  based on specific statistical tests · CPC title

• G06N3/045

  Combinations of networks · CPC title

• G06V10/454

  Integrating the filters into a hierarchical structure, e.g. convolutional neural networks [CNN] · CPC title

• G06N3/08

  Learning methods · CPC title