Vertical soldering technology for 3D circuit assembly

US11501982B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-11501982-B1
Application numberUS-202117458765-A
CountryUS
Kind codeB1
Filing dateAug 27, 2021
Priority dateAug 27, 2020
Publication dateNov 15, 2022
Grant dateNov 15, 2022

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit assembly with an electrical connection between two individual Printed Circuit Boards (PCBs) or Circuit Card Assemblies (CCAs) that are vertically stacked with a connection formed entirely of solder and with a gap in between surfaces that components may occupy. Coalescing solder paste merges between the surfaces when it is in a liquid state to form a solder bridge. The resultant assembly can be encapsulated to form a solid monolithic electronic assembly to improve robustness and allow the assembly to better withstand compressive forces.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for assembling printed circuit board assemblies comprising the steps of: on a top surface and a bottom surface to be joined, depositing wet solder paste on a copper land pattern such that an overprint of wet solder paste extends beyond the copper land pattern; positioning a spacer between the top surface and the bottom surface, said spacer having a width equal to the desired inter-board gap; stacking the top surface and the bottom surface such that the deposited wet solder paste on each is aligned; and forming a solder joint between the top surface and the bottom surface by merging the wet solder paste on the top surface with the wet solder paste on the bottom surface via a reflow operation. 2. The method of claim 1 wherein the copper land pattern is surrounded by a gap region and a solder mask region. 3. The method of claim 1 wherein a height of the wet solder paste is controlled by a thickness of a stencil used in the step of depositing. 4. The method of claim 3 wherein a volume of the wet solder paste is controlled by a thickness and an aperture area of a stencil used in the step of depositing. 5. The method of claim 1 wherein a height and area of the wet solder paste is controlled by a printing technology capable of depositing wet solder paste. 6. The method of claim 1 wherein the overprint is contained within a boundary devoid of other solderable elements. 7. The method of claim 1 wherein the volume of the wet solder paste is sufficient to form a solder bridge after a reflow operation. 8. The method of claim 7 wherein the volume of the reflowed solder paste is equal to a volume of a cylinder extending from the top surface to the bottom surface. 9. The method of claim 8 wherein the volume of the wet solder paste is one and a half times the volume of the cylinder. 10. The method of claim 1 wherein the desired inter-board gap is sufficient to contain one or more surface mount technology component. 11. The method of claim 10 wherein the spacer is the one or more surface mount technology components. 12. The method of claim 1 wherein the step of stacking the top surface and the bottom surface further comprises the use of tooling pins. 13. The method of claim 1 wherein the gap between the top surface and the bottom surface is comprised of air. 14. The method of claim 1 further comprising the step of filling a volume of the gap between the top surface and the bottom surface with a liquid fill material. 15. The method of claim 14 wherein the step of filling the volume of the gap further comprises the step of filling the volume via capillary action. 16. A method for assembling printed circuit board assemblies comprising the steps of: on a top surface and a bottom surface to be joined, depositing wet solder paste on a cylindrical copper land pattern such that an overprint of wet solder paste extends beyond the cylindrical copper land pattern and wherein the copper land pattern has a diameter magnitude twice as large as a desired inter-board gap and a diameter of the wet solder paste deposited on the cylindrical copper land is larger than the diameter of the copper land pattern such that a resultant height of solder paste after a reflow operation is taller than a height of the wet solder paste; positioning a spacer between the top surface and the bottom surface, said spacer having a width equal to a desired inter-board gap; stacking the top surface and the bottom surface such that the deposited wet solder paste on each is aligned; and forming a solder joint between the top surface and the bottom surface by merging the wet solder paste on the top surface with the wet solder paste on the bottom surface via a reflow operation. 17. The method of claim 16 wherein a total volume of wet solder paste deposited between the top surface and bottom surface is twice the volume of a solid cylinder that is formed by the diameter of the copper lands and the distance between them. 18. The method of claim 16 wherein a total volume of wet solder paste deposited between the top surface and bottom surface is more than twice the volume of a solid cylinder that is formed by the diameter of the copper lands and the distance between them. 19. The method of claim 16 wherein a total volume of wet solder paste deposited between the top surface and bottom surface is less than twice the volume of a solid cylinder that is formed by the diameter of the copper lands and the distance between them. 20. A method for assembling printed circuit board assemblies comprising the steps of: on a top surface to be joined, depositing wet solder paste on a copper land pattern; placing a component with a plurality of terminations on the deposited wet solder paste; depositing wet solder paste on a top most termination of the component; placing a bottom surface to be joined such that the deposited wet solder paste is aligned to a matching copper land pattern on the bottom surface; and forming a solder joint between the top surface and the bottom surface by merging the component with wet solder paste deposited on the termination on the top surface with the bottom surface via a reflow operation. 21. The method of claim 20 wherein the component has a number of terminations selected from the following group: three terminations and five terminations. 22. The method of claim 20 wherein wet solder paste is deposited on the copper land pattern of the bottom surface.

Assignees

Inventors

Classifications

  • Molten solder just before placing the component · CPC title

  • Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste · CPC title

  • Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other · CPC title

  • H05K3/368Primary

    parallel to each other (H05K3/361 takes precedence) · CPC title

  • Using a reflow oven · CPC title

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Frequently asked questions

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What does patent US11501982B1 cover?
A circuit assembly with an electrical connection between two individual Printed Circuit Boards (PCBs) or Circuit Card Assemblies (CCAs) that are vertically stacked with a connection formed entirely of solder and with a gap in between surfaces that components may occupy. Coalescing solder paste merges between the surfaces when it is in a liquid state to form a solder bridge. The resultant assemb…
Who is the assignee on this patent?
Us Gov Sec Army, The United States Of Americas As Represented By The Secretary Of The Army
What technology area does this patent fall under?
Primary CPC classification H05K3/368. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 15 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).