Tiling format for convolutional neural networks

US11494592B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11494592-B2
Application numberUS-202017006533-A
CountryUS
Kind codeB2
Filing dateAug 28, 2020
Priority dateDec 20, 2018
Publication dateNov 8, 2022
Grant dateNov 8, 2022

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Abstract

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Systems, apparatuses, and methods for converting data to a tiling format when implementing convolutional neural networks are disclosed. A system includes at least a memory, a cache, a processor, and a plurality of compute units. The memory stores a first buffer and a second buffer in a linear format, where the first buffer stores convolutional filter data and the second buffer stores image data. The processor converts the first and second buffers from the linear format to third and fourth buffers, respectively, in a tiling format. The plurality of compute units load the tiling-formatted data from the third and fourth buffers in memory to the cache and then perform a convolutional filter operation on the tiling-formatted data. The system generates a classification of a first dataset based on a result of the convolutional filter operation.

First claim

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What is claimed is: 1. An apparatus comprising: a processor configured to access a memory comprising a first buffer and a second buffer storing data in a linear format: read data values from sequential locations in the first buffer; step through the second buffer in the memory with a given stride, wherein the given stride is greater than one; and write the values read from the sequential locations in the first buffer to the second buffer according to the given stride in a tiling format. 2. The apparatus as recited in claim 1 , wherein the stride is based on a number of input channels and a number of convolutional filters. 3. The apparatus as recited in claim 2 , wherein the stride is equal to a sum of the number of input channels and the number of convolutional filters. 4. The apparatus as recited in claim 1 , wherein the stride is equal to a number of pixel channels. 5. The apparatus as recited in claim 1 , wherein the data comprises convolutional data and the processor is configured to convert the convolutional data from the linear format to the tiling format. 6. The apparatus as recited in claim 5 , wherein the processor is configured to convert the convolutional data from the linear format to the tiling format, in response to a request to perform a convolutional filter operation. 7. The apparatus as recited in claim 6 , wherein the processor is further configured to: read image data stored in a linear format from a third buffer in memory and store the image data in a fourth buffer in memory in a tiling format; and perform the convolutional filter operation using data stored in the third buffer and the fourth buffer to generate a result in a tiling format. 8. A method comprising: storing, by a memory, data in a first buffer and a second buffer in a linear format; reading, by a processor, data values from sequential locations in the first buffer; stepping, by the processor, through the second buffer in the memory with a given stride, wherein the given stride is greater than one; and writing, by the processor, the values read from the sequential locations in the first buffer to the second buffer according to the given stride in a tiling format. 9. The method as recited in claim 8 , wherein the stride is based on a number of input channels and a number of convolutional filters. 10. The method as recited in claim 9 , wherein the stride is equal to a sum of the number of input channels and the number of convolutional filters. 11. The method as recited in claim 8 , wherein the stride is equal to a number of pixel channels. 12. The method as recited in claim 8 , wherein the data comprises convolutional data and the method further comprises converting the convolutional data from the linear format to the tiling format. 13. The method as recited in claim 12 , further comprising converting the convolutional data from the linear format to the tiling format, in response to a request to perform a convolutional filter operation. 14. The method as recited in claim 13 , further comprising: reading image data stored in a linear format from a third buffer in memory and store the image data in a fourth buffer in memory in a tiling format; and performing the convolutional filter operation using data stored in the third buffer and the fourth buffer to generate a result in a tiling format. 15. A non-transitory storage medium comprising program instructions, wherein the program instructions are executable to: store, in a memory, data in a first buffer and a second buffer in a linear format; read data values from sequential locations in the first buffer; stepping through the second buffer in the memory with a given stride, wherein the given stride is greater than one; and write the values read from the sequential locations in the first buffer to the second buffer according to the given stride in a tiling format. 16. The non-transitory storage medium as recited in claim 15 , wherein the stride is based on a number of input channels and a number of convolutional filters. 17. The non-transitory storage medium as recited in claim 16 , wherein the stride is equal to a sum of the number of input channels and the number of convolutional filters. 18. The non-transitory storage medium as recited in claim 15 , wherein the stride is equal to a number of pixel channels. 19. The non-transitory storage medium as recited in claim 15 , wherein the data comprises convolutional data and the program instructions are further executable to convert the convolutional data from the linear format to the tiling format. 20. The non-transitory storage medium as recited in claim 19 , wherein the program instructions are executable to convert the convolutional data from the linear format to the tiling format in response to a request to perform a convolutional filter operation.

Assignees

Inventors

Classifications

  • Biologically inspired filters, e.g. difference of Gaussians [DoG] or Gabor filters · CPC title

  • using specific electronic processors · CPC title

  • using neural networks · CPC title

  • by performing operations within image blocks; by using histograms, e.g. histogram of oriented gradients [HoG]; by summing image-intensity values; Projection analysis · CPC title

  • Integrating the filters into a hierarchical structure, e.g. convolutional neural networks [CNN] · CPC title

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What does patent US11494592B2 cover?
Systems, apparatuses, and methods for converting data to a tiling format when implementing convolutional neural networks are disclosed. A system includes at least a memory, a cache, a processor, and a plurality of compute units. The memory stores a first buffer and a second buffer in a linear format, where the first buffer stores convolutional filter data and the second buffer stores image data…
Who is the assignee on this patent?
Advanced Micro Devices Inc
What technology area does this patent fall under?
Primary CPC classification G06N3/08. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 08 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).