Integrated circuit and terminal device

Patent metadata

Field	Value
Publication number	US-11489247-B2
Application number	US-202117150365-A
Country	US
Kind code	B2
Filing date	Jan 15, 2021
Priority date	Jul 17, 2018
Publication date	Nov 1, 2022
Grant date	Nov 1, 2022

Abstract

Embodiments of this application disclose an integrated circuit and a terminal device, to resolve a problem that an existing dual-band antenna has a relatively small low-frequency band range and is difficult to meet use requirements. An antenna includes a bearer structure, a first radiation patch, a second radiation patch, and a radio frequency processing chip. The first radiation patch, the second radiation patch, and the radio frequency processing chip are separately placed on different layers of the bearer structure. A first feed line and a second feed line are disposed in the bearer structure. The radio frequency processing chip feeds the first radiation patch by using the first feed line. The radio frequency processing chip feeds the second radiation patch by using the second feed line.

First claim

What is claimed is:

1. An integrated circuit in a terminal device, comprising:
a bearer structure;
a first radiation patch;
a second radiation patch; and
a radio frequency processing chip, wherein the first radiation patch, the second radiation patch, and the radio frequency processing chip are placed on different layers of the bearer structure, a first feed line and a second feed line are disposed in the bearer structure, the radio frequency processing chip feeds the first radiation patch by using the first feed line, and the radio frequency processing chip feeds the second radiation patch by using the second feed line.

2. The integrated circuit according to claim 1 , wherein a size of the first radiation patch is associated with a first frequency band signal, and a size of the second radiation patch is associated with a second frequency band signal.

3. The integrated circuit according to claim 2 , wherein a first radio frequency line corresponding to the first frequency band signal and a second radio frequency line corresponding to the second frequency band signal are disposed in the radio frequency processing chip, the first feed line is connected to the first radio frequency line, and the second feed line is connected to the second radio frequency line.

4. The integrated circuit according to claim 3 , wherein the first radiation patch is connected to the first radio frequency line by using the first feed line; and
the second radiation patch is connected to the second radio frequency line by using the second feed line.

5. The integrated circuit according to claim 1 , wherein the bearer structure comprises a first bearer structure that bears the first radiation patch, and a second bearer structure that bears the second radiation patch.

6. The integrated circuit according to claim 5 , wherein the bearer structure further comprises:
a ground plane that comprises an opening, wherein the first feed line and the second feed line pass through the opening to feed the first radiation patch and the second radiation patch.

7. The integrated circuit according to claim 6 , wherein the first radiation patch is located between the second radiation patch and the ground plane.

8. The integrated circuit according to claim 7 , wherein a window is disposed on the first radiation patch, and the second feed line passes through the window to feed the second radiation patch.

9. The integrated circuit according to claim 7 , further comprising:
a plurality of metal columns, wherein one end of each of the plurality of metal columns is connected to the ground plane, an other end of each of the plurality of metal columns is connected to the first radiation patch, the plurality of metal columns form an encirclement around the first radiation patch, and the second feed line passes through the encirclement.

10. The integrated circuit according to claim 9 , wherein the first feed line is located outside the encirclement.

11. The integrated circuit according to claim 1 , wherein the first feed line comprises a first vertical feed line and a first horizontal feed line, and the second feed line comprises a second vertical feed line and a second horizontal feed line.

12. The integrated circuit according to claim 11 , wherein the first radiation patch comprises two feed points that correspond to the first vertical feed line and the first horizontal feed line respectively, and the second radiation patch comprises two feed points that correspond to the second vertical feed line and the second horizontal feed line respectively.

13. The integrated circuit according to claim 12 , wherein a difference between polarization directions of the two feed points on the first radiation patch is 90°, a difference between polarization directions of the two feed points on the second radiation patch is 90°, and differences between polarization directions of a feed point of the two feed points on the first radiation patch and the two feed points on the second radiation patch are 90° and 180°.

14. The integrated circuit according to claim 11 , wherein a first groove is disposed on the first radiation patch, and the first vertical feed line and the first horizontal feed line are located on two sides of the first groove respectively; and
a second groove is disposed on the second radiation patch, and the second vertical feed line and the second horizontal feed line are located on two sides of the second groove respectively.

15. The integrated circuit according to claim 1 , wherein the first radiation patch and the second radiation patch are parallel to each other, and a center of the first radiation patch is aligned with a center of the second radiation patch.

16. The integrated circuit according to claim 1 , wherein the first radiation patch is divided into a first part and a second part that are connected by using a tunable capacitor or a switch unit.

17. The integrated circuit according to claim 1 , wherein the second radiation patch is divided into a first part and a second part that are connected by using a tunable capacitor or a switch unit.

18. The integrated circuit according to claim 1 , wherein the radio frequency processing chip is connected to the first feed line and the second feed line by using solder bumps.

19. The integrated circuit according to claim 1 , wherein the bearer structure comprises at least one of:
one or more stacked dielectric layers,
a dielectric layer and a metal layer that are alternately stacked,
a dielectric layer and a metal ball structure that are alternately stacked,
a dielectric layer and a metal column structure that are alternately stacked, or
a plastic ball structure and a metal layer that are alternately stacked.

20. The integrated circuit according to claim 19 , wherein a material of the dielectric layer comprises at least one of organic resin, polytetrafluoroethylene, or a polytetrafluoroethylene composite material comprising a fiberglass cloth; wherein a material of the metal layer comprises at least one of copper or tin; wherein a material of the metal column structure comprises at least one of copper or tin; and wherein a material of the metal ball structure includes at least one of copper or tin.

21. The integrated circuit according to claim 19 , wherein the metal ball structure comprises a plurality of metal balls, the metal column structure comprises a plurality of metal columns, and the plastic ball structure comprises a plurality of plastic balls.

22. A terminal device, comprising an integrated circuit that comprises:
a bearer structure;
a first radiation patch;
a second radiation patch; and
a radio frequency processing chip, wherein the first radiation patch, the second radiation patch, and the radio frequency processing chip are placed on different layers of the bearer structure, a first feed line and a second feed line are disposed in the bearer structure, the radio frequency processing chip feeds the first radiation patch by using the first feed line, and the radio frequency processing chip feeds the second radiation patch by using the second feed line.

23. The terminal device according to claim 22 , further comprising:
a printed circuit board (PCB), wherein the PCB is connected to a bearer structure in the integrated circuit by using a ball grid array (BGA).

24. The terminal device according to claim 22 , wherein the terminal device is a smartphone.

Assignees

• Huawei Tech Co Ltd

Inventors

• Zhou Weixi
• Chang Ming
• Dong Hailin
• Liu Liangsheng
• Yin Hongcheng

Classifications

• H01Q1/48

  Earthing means; Earth screens; Counterpoises · CPC title

• H01Q1/243

  with built-in antennas · CPC title

• H01Q1/2283 Primary

  mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package · CPC title

• H01Q9/0414

  in a stacked or folded configuration · CPC title

• H01Q9/0442

  with particular tuning means · CPC title