Qubit-Optical-CMOS Integration Using Structured Substrates
US-2021217809-A1 · Jul 15, 2021 · US
US11489101B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11489101-B2 |
| Application number | US-202016880270-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 21, 2020 |
| Priority date | Jun 6, 2019 |
| Publication date | Nov 1, 2022 |
| Grant date | Nov 1, 2022 |
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The present disclosure discloses a device and a method for fabricating a superconducting circuit including a superconducting qubit. The superconducting circuit comprises a bottom electrode interconnecting a superconducting qubit and a first part of the superconducting circuit. The bottom electrode comprises a bottom electrode of the superconducting qubit and a bottom electrode of the first part of the superconducting circuit. The bottom electrode of the superconducting qubit and the bottom electrode of the first part of the superconducting circuit are formed in a first superconducting layer.
Opening claim text (preview).
The invention claimed is: 1. A superconducting circuit comprising: a bottom electrode interconnecting a superconducting qubit and a first part of the superconducting circuit, the bottom electrode comprising: a bottom electrode of the superconducting qubit; and a bottom electrode of the first part of the superconducting circuit, wherein the bottom electrode of the first part of the superconducting circuit is integrally formed with the bottom electrode of the superconducting circuit. 2. The superconducting circuit according to claim 1 , further comprising a top electrode interconnecting the superconducting qubit and a second part of the superconducting circuit, the top electrode comprising: a top electrode of the superconducting qubit; and a top electrode of the second part of the superconducting circuit. 3. The superconducting circuit according to claim 1 , wherein the bottom electrode of the superconducting qubit and the bottom electrode of the first part of the superconducting circuit are formed in a first superconducting layer. 4. The superconducting circuit according to claim 3 , wherein the top electrode of the superconducting qubit and the top electrode of the second part of the superconducting circuit are formed in a second superconducting layer. 5. The superconducting circuit according to claim 4 , wherein the first superconducting layer or the second superconducting layer comprises a metal layer or a superconducting compound layer. 6. The superconducting circuit according to claim 5 , wherein the metal layer or the superconducting compound layer includes at least one of the following: aluminum, niobium, niobium nitride, or titanium nitride. 7. The superconducting circuit according to claim 2 , wherein an insulation layer is provided on an overlapped area between the bottom electrode and the top electrode.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title
Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00 · CPC title
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