Display panel and display device
US-2024404436-A1 · Dec 5, 2024 · US
US11488525B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11488525-B2 |
| Application number | US-201816319483-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 29, 2018 |
| Priority date | Nov 14, 2018 |
| Publication date | Nov 1, 2022 |
| Grant date | Nov 1, 2022 |
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Disclosed are a driving method for a display panel and a drive circuit. The drive circuit includes: a power circuit, configured to output a power-off signal; a pixel control circuit, configured to turn on an active switch corresponding to a pixel; and a power-off circuit, configured to close a display panel, where the pixel control circuit includes: a first logical circuit, configured to output a first control signal for turning off the active switch; a second logical circuit, configured to output a second control signal for turning on the active switch; and a switching circuit, configured to switch the first logical circuit and the second logical circuit, the active switch corresponding to the pixel being turned on when the display panel is closed.
Opening claim text (preview).
What is claimed is: 1. A drive circuit of a display panel, comprising: a power circuit, configured to output a power-off signal; a pixel control circuit, configured to turn on an active switch corresponding to each pixel of the display panel in response to the power-off signal and releasing charges stored in the display panel during operation ensuring normal turn-off of the display panel; and a power-off circuit, configured to turn off the display panel; wherein the pixel control circuit comprises: a first logical circuit, configured to output a first control signal for turning off the active switch corresponding to each pixel of the display panel when the display panel is operating; a second logical circuit, configured to output a second control signal for turning on the active switch corresponding to each pixel of the display panel when the display panel is turned oft and a switching circuit, configured to switch between the first logical circuit and the second logical circuit; wherein the switching circuit is configured to control the second logical circuit to be switched on to control the active switch corresponding to each pixel to be turned on simultaneously when the display panel is turned off; wherein the first logical circuit comprises a first resistor, a second resistor, and a first active switch, wherein one end of the first resistor is directly connected to one end of the second resistor, a drain electrode of the first active switch is directly connected to a control end of the active switch corresponding to each pixel of the display panel, a gate electrode of the first active switch is directly connected between the first resistor and the second resistor, and a source electrode of the first active switch is directly connected to the power circuit and directly to another end of the first resistor; the second logical circuit comprises a third resistor, a fourth resistor, and a second active switch, wherein one end of the third resistor is directly connected to one end of the fourth resistor, a gate electrode of the second active switch is directly connected between the third resistor and the fourth resistor, and a drain electrode of the second active switch is directly connected to a control end of the active switch corresponding to each pixel of the display panel, and a source electrode of the second active switch is directly connected to a high-level signal VGH; and the switching circuit comprises a third active, switch, a fourth active switch, and a logical power supply VDD, wherein a drain electrode of the third active switch is directly connected to the logical power supply VDD, a source electrode of the third active switch is directly connected to the other end of the second resistor away from the first resistor, and a source electrode of the fourth active switch is directly connected to the other end of the fourth resistor away from the third resistor; wherein a gate electrode of the fourth active switch is directly connected to a gate electrode of the third active switch, and a drain electrode of the fourth active switch is directly connected to ground GND; wherein the drain electrode of the first active switch is directly connected to the drain electrode of the second active switch; wherein when the display panel is operating under a normal state, a low voltage level is input to a gate electrode of the third active switch, which is thus turned on so that the logical power supply VDD is communicated with the first logical circuit through the third active switch, the first resistor, and the second resistor, and so a voltage V 1 between the first and second resistors is greater than a low-level voltage so that the first active switch is turned on, and a low-level signal is output throe h the first active switch; meanwhile, the fourth active switch is turned off, a voltage V 2 between the third and fourth resistors is equal to a high-level voltage due to the high-level signal VGH so that the second active switch is also turned off and a high-level signal is not output; and wherein when the display panel is being turned off a high voltage level is input to the gate electrode of the third active switch which is thus turned off and the voltage V 1 is equal to a low-level voltage so that the low-level signal is not able to be output; meanwhile, the fourth active switch is turned on so that V 2 is smaller than the high-level voltage because it is pulled down by the ground GND, so that the second active switch is turned on, and the high-level signal VGH is output to the active switch corresponding to each pixel of the display panel, which is turned on accelerating the release of charges stored in the display panel. 2. The drive circuit according to claim 1 , wherein the power circuit comprises a power supply. 3. The drive circuit according to claim 2 , wherein a circuit control signal is output by the power supply. 4. The drive circuit according to claim 3 , wherein the circuit control signal comprises a high-level signal, a low-level signal and a circuit switching signal. 5. The drive circuit according to claim 3 , wherein the active switch corresponding to each pixel is turned on through the circuit control signal.
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