Overload protection engine

Patent metadata

Field	Value
Publication number	US-11477125-B2
Application number	US-201715594838-A
Country	US
Kind code	B2
Filing date	May 15, 2017
Priority date	May 15, 2017
Publication date	Oct 18, 2022
Grant date	Oct 18, 2022

Abstract

A fabric interface, including: an ingress port to receive incoming network traffic; a host interface to forward the incoming network traffic to a host; and a virtualization-aware overload protection engine including: an overload detector to detect an overload condition on the incoming network traffic; a packet inspector to inspect packets of the incoming network traffic; and a prioritizer to identify low priority packets to be dropped, and high priority packets to be forwarded to the host.

First claim

What is claimed is:

1. A fabric interface to communicatively couple a compute node to a network, comprising:
an ingress port to receive incoming network traffic;
a memory comprising a policy table;
a host interface to forward the incoming network traffic to a host via a local peripheral component interconnect express (PCIe) bus; and
circuitry within the fabric interface to, before the incoming network traffic reaches a central processor unit (CPU) of the compute node:
receive an incoming network packet via the ingress port, wherein the incoming network packet is directed to one of a plurality of virtual network functions (VNFs), and based on a query to the policy table and a queue depth of the one VNF, forward the incoming network packet to a node in a decision tree, forward the incoming network packet to a host, or drop the incoming network packet.

2. The fabric interface of claim 1 , further comprising a counter to count dropped low priority packets.

3. The fabric interface of claim 1 , wherein the circuitry includes a hardware intellectual property (IP) block.

4. The fabric interface of claim 1 , further comprising an overload protection controller to apply hysteresis to the incoming network traffic to smooth overload handling.

5. The fabric interface of claim 1 , further comprising a packet dispatcher to dispatch known high priority packets to the host.

6. The fabric interface of claim 1 , further comprising a virtual network function (VNF) overload protector comprising a VNF policy table comprising logic for assigning a first class of packets as high priority based on a first VNF attribute, and a second class of packets as low priority based on a second VNF attribute.

7. The fabric interface of claim 1 , further comprising a virtual interface overload protector comprising a virtual interface policy table comprising logic for assigning a first class of packets as high priority based on a first virtual interface attribute, and a second class of packets as low priority based on a second virtual interface attribute.

8. The fabric interface of claim 1 , further comprising a protocol overload protector comprising a protocol policy table comprising logic for assigning a first class of packets as high priority based on a first protocol attribute, and a second class of packets as low priority based on a second protocol attribute.

9. The fabric interface of claim 1 , further comprising a traffic class overload protector comprising a traffic class table comprising logic for assigning a first class of packets as high priority based on a first traffic class, and a second class of packets as low priority based on a second traffic class.

10. The fabric interface of claim 1 , further comprising a load balancer to load balance high priority packets to a plurality of cores on the host.

11. The fabric interface of claim 1 , further comprising a weighted random early detection (WRED) module to mark high priority packets for further inspection by the host.

12. One or more tangible, non-transitory storage mediums having encoded thereon instructions to:
receive an incoming network packet via an ingress interface, wherein the incoming network packet is directed to a virtual network function (VNF);
before the incoming network packet reaches a central processor unit (CPU) of a compute node detect, via a local peripheral component interconnect express (PCIe) bus, based on a query to a policy table and a queue depth of the VNF, forward the incoming network packet to a node in a decision tree, forward the incoming network packet to a host, or drop the incoming network packet.

13. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to count dropped low priority packets.

14. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to apply hysteresis to the incoming network traffic to smooth overload handling.

15. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to dispatch known high priority packets to a host device.

16. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to provide virtual network function (VNF) overload protection comprising accessing a VNF policy table comprising logic for assigning a first class of packets as high priority based on a first VNF attribute, and a second class of packets as low priority based on a second VNF attribute.

17. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to provide virtual interface overload protection comprising accessing a virtual interface policy table comprising logic for assigning a first class of packets as high priority based on a first virtual interface attribute, and a second class of packets as low priority based on a second virtual interface attribute.

18. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to provide protocol overload protection comprising accessing a protocol policy table comprising logic for assigning a first class of packets as high priority based on a first protocol attribute, and a second class of packets as low priority based on a second protocol attribute.

19. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to provide traffic class overload protection comprising accessing a traffic class table comprising logic for assigning a first class of packets as high priority based on a first traffic class, and a second class of packets as low priority based on a second traffic class.

20. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to provide load balancing to load balance high priority packets to a plurality of cores on a host device.

21. The one or more tangible, non-transitory storage mediums of claim 12 , wherein the instructions are further to provide weighted random early detection (WRED) to mark high priority packets for further inspection by a host device.

22. A computing apparatus comprising:
a host comprising a core; and
a fabric interface circuit to communicatively couple a compute node to a network, comprising:
an ingress port to receive incoming network traffic;
a host interface to forward the incoming network traffic to the host via a local peripheral component interconnect express (PCIe) bus; and
circuitry to, before the incoming network traffic reaches a central processor unit (CPU) of the compute node:
receive an incoming network packet on the ingress port, wherein the incoming network packet is directed to one of a plurality of virtual network functions (VNFs), and based on a query to a policy table and a queue depth of the one VNF, forward the incoming network packet to a node in a decision tree, forward the incoming network packet to a host, or drop the incoming network packet.

23. The computing apparatus of claim 22 , further comprising an overload protection controller to apply hysteresis to the incoming network traffic to smooth overload handling.

24. The computing apparatus of claim 22 , further comprising a packet dispatcher to dispatch known high priority packets to the host.

25. The computing apparatus of claim 22 , wherein the circuitry further comprises circuitry to provide decis

Assignees

• Intel Corp

Inventors

• Browne John J
• Macnamara Chris
• Chayat Ronen

Classifications

• H04L49/508

  Head of Line Blocking Avoidance · CPC title

• H04L67/10

  in which an application is distributed across nodes in the network (software deployment G06F8/60; multiprogramming arrangements G06F9/46) · CPC title

• H04L47/2441 Primary

  relying on flow classification, e.g. using integrated services [IntServ] · CPC title

• H04L47/11

  Identifying congestion · CPC title

• H04L63/1408

  by monitoring network traffic (monitoring network traffic per se H04L43/00) · CPC title