Techniques for achieving multiple transistor fin dimensions on a single die
US-10141311-B2 · Nov 27, 2018 · US
US11476350B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11476350-B2 |
| Application number | US-201816628610-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 31, 2018 |
| Priority date | Jul 12, 2017 |
| Publication date | Oct 18, 2022 |
| Grant date | Oct 18, 2022 |
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[Problem to be Solved] To provide a transistor and an electronic device whose characteristics are easier to control.[Solution] A transistor including: a semiconductor substrate; an insulating layer provided on the semiconductor substrate; a semiconductor layer provided on the insulating layer in a protruding manner; and a gate electrode provided over a portion of the insulating layer on the semiconductor layer and the insulating layer. A middle portion of a channel region of the semiconductor layer covered by the gate electrode is provided in a shape different from a shape of at least one of ends of the channel region of the semiconductor layer.
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The invention claimed is: 1. A transistor comprising: a semiconductor substrate; a semiconductor layer extending above an upper surface of the semiconductor substrate, the semiconductor layer including a channel region with a middle portion and end portions respectively extending from the middle portion in a channel length direction, the middle portion being formed in a shape different from a shape of the end portions, the middle portion being larger than the respective end portions in at least one dimension, a total volume of the middle portion being larger than a total volume of each of the respective end portions; an insulating layer formed on the upper surface of the semiconductor substrate, the insulating layer being in contact with the upper surface of the semiconductor substrate and in contact with portions of sidewalls of the middle portion and the end portions, the middle portion and the end portions protruding above the insulating layer; and a gate structure formed over at least a portion of the channel region of the semiconductor layer and over and in contact with at least a portion of the insulating layer, wherein the middle portion of the channel region has a first width at the surface of the semiconductor substrate, and a second width at an upper surface, the first width being larger than the second width, such that the middle portion has a taper in a cross section along a channel width direction, the taper of the middle portion being larger than a taper of the end portions. 2. The transistor according to claim 1 , wherein an ion impurity is introduced to the semiconductor layer, and polarity of an ion impurity introduced to the middle portion of the channel region of the semiconductor layer is different from polarity of an ion impurity introduced to the end portions of the channel region of the semiconductor layer. 3. The transistor according to claim 1 , wherein the gate structure includes a gate electrode is provided on the semiconductor layer via a gate insulating film provided on the semiconductor layer. 4. The transistor according to claim 1 , wherein a source electrode or a drain electrode is coupled to the semiconductor layer protruding from the channel region. 5. The transistor according to claim 4 , wherein at least one of the end portions has an end on a side to which the drain electrode is coupled. 6. The transistor according to claim 1 , wherein the transistor is included in a circuit that is included in a protection element. 7. An electronic device comprising the transistor according to claim 1 . 8. The electronic device according to claim 7 , wherein an ion impurity is introduced to the semiconductor layer, and polarity of an ion impurity introduced to the middle portion of the channel region of the semiconductor layer is different from polarity of an ion impurity introduced to the end portions of the channel region of the semiconductor layer. 9. The electronic device according to claim 7 , wherein the gate structure includes a gate electrode provided on the semiconductor layer via a gate insulating film provided on the semiconductor layer. 10. The electronic device according to claim 7 , wherein a source electrode or a drain electrode is coupled to the semiconductor layer protruding from the channel region. 11. The electronic device according to claim 10 , wherein at least one of the end portions has an end on a side to which the drain electrode is coupled. 12. The electronic device according to claim 7 , wherein the transistor is included in a circuit that is included in a protection element.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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