SiC WAFER PRODUCING METHOD
US-2018218896-A1 · Aug 2, 2018 · US
US11469142B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11469142-B2 |
| Application number | US-202016857483-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 24, 2020 |
| Priority date | Apr 26, 2019 |
| Publication date | Oct 11, 2022 |
| Grant date | Oct 11, 2022 |
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A device chip manufacturing method includes attaching a wafer to the first surface of a semiconductor ingot, separating the semiconductor ingot into a subject part and a remaining part after attachment, the subject part being attached to the wafer to form a laminated wafer having a front side as an exposed surface of the subject part and a back side as an exposed surface of the wafer, setting a plurality of crossing division lines on the front side of the laminated wafer to thereby define a plurality of separate regions after separation, and next forming a plurality of devices in the respective separate regions, and then dividing the laminated wafer along the division lines after forming the devices, thereby forming the plural device chips including the respective devices.
Opening claim text (preview).
What is claimed is: 1. A device chip manufacturing method for manufacturing a plurality of device chips from a semiconductor ingot having a first surface and a second surface opposite to the first surface, the device chip manufacturing method comprising: an attaching step of attaching a wafer to the first surface of the semiconductor ingot; a separating step of separating the semiconductor ingot into a subject part and a remaining part after performing the attaching step, the subject part being attached to the wafer to form a laminated wafer having a front side as an exposed surface of the subject part and a back side as an exposed surface of the wafer; a device forming step of setting a plurality of crossing division lines on the front side of the laminated wafer to thereby define a plurality of separate regions after performing the separating step, and next forming a plurality of devices in the respective separate regions; and a dividing step of dividing the laminated wafer along the division lines after performing the device forming step, thereby forming the plurality of device chips including the respective devices. 2. The device chip manufacturing method according to claim 1 , wherein the separating step includes: a first step of setting a focal point of a laser beam having a transmission wavelength to the semiconductor ingot inside the semiconductor ingot at a predetermined depth from the second surface of the semiconductor ingot and next applying the laser beam to the second surface of the semiconductor ingot to thereby form a separation layer inside the semiconductor ingot at the predetermined depth, and a second step of applying an external force to the separation layer to thereby separate the semiconductor ingot into the subject part and the remaining part. 3. The device chip manufacturing method according to claim 1 , further comprising: a laser beam applying step of setting a focal point of a laser beam having a transmission wavelength to the semiconductor ingot inside the semiconductor ingot at a predetermined depth from the first surface of the semiconductor ingot before performing the attaching step, and next applying the laser beam to the first surface of the semiconductor ingot to thereby form a separation layer inside the semiconductor ingot at the predetermined depth; the separating step including a step of applying an external force to the separation layer to thereby separate the semiconductor ingot into the subject part and the remaining part. 4. The device chip manufacturing method according to claim 1 , further comprising: a second attaching step of attaching a second wafer to the remaining part of the semiconductor ingot after performing the separating step; and a second separating step of separating the remaining part of the semiconductor ingot into a second subject part and a new remaining part after performing the second attaching step, the second subject part being attached to the second wafer to form a second laminated wafer. 5. The device chip manufacturing method according to claim 1 , wherein the semiconductor ingot includes an SiC ingot. 6. The device chip manufacturing method according to claim 1 , wherein the attaching step includes a step of bonding the wafer through an insulating layer to the semiconductor ingot. 7. The device chip manufacturing method according to claim 1 , wherein each of the devices includes a MOSFET. 8. The device chip manufacturing method according to claim 1 , wherein each of the devices includes a MEMS device. 9. The device chip manufacturing method according to claim 1 , wherein the wafer is formed of a material that is different from the material of the ingot. 10. The device chip manufacturing method according to claim 9 , wherein the wafer is formed of SiC. 11. The device chip manufacturing method according to claim 9 , wherein the wafer is formed of SiC and the ingot is formed of silicon. 12. The device chip manufacturing method according to claim 9 , wherein the ingot is formed of a hexagonal single-crystal material. 13. The device chip manufacturing method according to claim 1 , wherein said attaching step comprises diffusion bonding. 14. The device chip manufacturing method according to claim 1 , wherein the attaching step comprises plasma-assisted low-temperature bonding.
Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title
using bonding · CPC title
Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement · CPC title
Cutting or separating of wafers, substrates or parts of devices · CPC title
Separation of active layers from substrates · CPC title
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