Adaptable low dropout (LDO) voltage regulator and method therefor

US11467613B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11467613-B2
Application numberUS-202016949249-A
CountryUS
Kind codeB2
Filing dateOct 21, 2020
Priority dateJul 15, 2020
Publication dateOct 11, 2022
Grant dateOct 11, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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An adaptable LDO regulator includes an error amplifier providing an error voltage according to a difference between a feedback voltage and a reference voltage, first and second pass transistors each having a first current electrode for receiving an input voltage, a control electrode for receiving the error voltage, and a second current electrode, the second current electrode of the second pass transistor providing an output voltage, a voltage divider generating the feedback voltage in response to a voltage on an input thereof, and a mode selection network that in a closed loop mode, couples the second current electrodes of the first and second pass transistors together and to the input of the voltage divider, and in an open loop mode, couples the second current electrode of the first pass transistor to the input of the voltage divider and decouples the second current electrodes of the first and second pass transistors.

First claim

Opening claim text (preview).

What is claimed is: 1. An adaptable low dropout (LDO) regulator comprising: an error amplifier providing an error voltage according to a difference between a feedback voltage and a reference voltage; first and second pass transistors each having a first current electrode for receiving an input voltage, a control electrode for receiving said error voltage, and a second current electrode, said second current electrode of said second pass transistor providing an output voltage; a voltage divider generating said feedback voltage in response to a voltage on an input thereof; and a mode selection network that: in a closed loop mode, directly and electrically couples said second current electrodes of said first and second pass transistors together and to said input of said voltage divider; and in an open loop mode, directly and electrically couples said second current electrode of said first pass transistor to said input of said voltage divider and decouples said second current electrodes of said first and second pass transistors. 2. The adaptable LDO regulator of claim 1 , wherein a second gate width-to-gate length ratio of said second pass transistor is N times larger than a first gate width-to-gate length ratio of said first pass transistor, wherein N is an integer greater than one. 3. The adaptable LDO regulator of claim 1 , wherein said second pass transistor comprises: a base transistor having a first current electrode for receiving said input voltage, a control electrode for receiving said error voltage, and a second current electrode for providing said output voltage; and a plurality of selectable transistors each having a first current electrode for receiving said input voltage, a control electrode that selectively receiving said error voltage according to a corresponding select signal, and a second current electrode coupled to said second current electrode of said base transistor. 4. The adaptable LDO regulator of claim 3 , further comprising: a selectable resistance having a first terminal coupled to said second current electrode of said second pass transistor, a second terminal connected to said a ground voltage terminal, and a control terminal for receiving a select signal. 5. The adaptable LDO regulator of claim 1 , further comprising: a lowpass filter coupled between an output of said error amplifier and said control electrode of said first pass transistor and said control electrode of said second pass transistor, wherein: in said closed loop mode, said mode selection network further disables said lowpass filter; and in said open loop mode, said mode selection network further enables said lowpass filter. 6. The adaptable LDO regulator of claim 5 , wherein: said lowpass filter comprises: a resistor having a first terminal for receiving said error voltage, and a second terminal coupled to said control electrode of said first pass transistor and said control electrode of said second pass transistor; and a capacitor having a first terminal, and a second terminal coupled to ground, and said mode selection network comprises: a first switch coupled between said first and second terminals of said resistor; and a second switch having a first terminal coupled to said second terminal of said resistor, and a second terminal coupled to said first terminal of said capacitor, wherein in a fast charging mode, the adaptable LDO regulator opens said first switch and closes said second switch. 7. The adaptable LDO regulator of claim 1 , wherein said voltage divider comprises: a first resistor having a first terminal coupled to said second current electrode of said first pass transistor, a second terminal coupled to a feedback terminal for providing said feedback voltage, and a control terminal for receiving a voltage select signal, wherein said first resistor is a variable resistor and said voltage select signal selects a resistance of said first resistor; and a second resistor having a first terminal coupled to said second terminal of said first resistor, and a second terminal coupled to a ground voltage terminal. 8. The adaptable LDO regulator of claim 7 , further comprising a capacitor having a first terminal coupled to said first terminal of said first resistor, and a second terminal coupled to said second terminal of said first resistor. 9. The adaptable LDO regulator of claim 7 , wherein said first terminal of said second resistor is coupled to said second terminal of said first resistor through a dummy switch, wherein said dummy switch has a first current electrode coupled to said second terminal of said first resistor, a second current electrode coupled to said first terminal of said second resistor, and a control electrode biased to a voltage that makes said dummy switch conductive. 10. The adaptable LDO regulator of claim 7 , wherein said first resistor comprises: a first fixed resistor having a first terminal forming said input of said voltage divider, and a second terminal; a first branch having a first switch coupled between said second terminal of said first fixed resistor and said feedback terminal; a second branch having a second fixed resistor with a first terminal coupled to said second terminal of said first fixed resistor, and a second terminal, and a second switch coupled between said second terminal of said second fixed resistor and said feedback terminal; and a third branch having a third fixed resistor with a first terminal coupled to said second terminal of said second fixed resistor, and a second terminal, and a third switch coupled between said second terminal of said third fixed resistor and said feedback terminal. 11. The adaptable LDO regulator of claim 10 , wherein said first resistor further comprises: a fourth branch having a fourth fixed resistor with a first terminal coupled to said second terminal of said third fixed resistor, and a second terminal, and a fourth switch coupled between said second terminal of said fourth fixed resistor and said feedback terminal. 12. The adaptable LDO regulator of claim 10 , wherein a resistance of said third fixed resistor is substantially equal to a resistance of said second fixed resistor. 13. The adaptable LDO regulator of claim 10 , wherein said first switch comprises one unit switch, said second switch comprises two unit switches, and said third switch comprises three unit switches. 14. The adaptable LDO regulator of claim 13 , wherein said first terminal of said second resistor is coupled to said second terminal of said first resistor through a dummy switch, and wherein each unit switch in said first switch, said second switch, and said third switch has a bulk terminal coupled to said first terminal of said second resistor. 15. The adaptable LDO regulator of claim 1 , further comprising: a reference voltage tracking circuit coupled to said error amplifier that in a tracking mode sets said reference voltage dynamically according to a sum of a P-channel transistor threshold plus an N-channel transistor threshold, and in a normal operation mode sets said reference voltage statically to a predetermined voltage. 16. An adaptable low dropout (LDO) regulator for use with a low-noise voltage controlled oscillator or the like, the adaptable LDO regulator comprising: an error amplifier having a non-inverting input for receiving a reference voltage, an inverting input for receiving a feedback voltage from a feedback terminal, and an output; a lowpass filter having an input coupled to said output of said error amplifier, and an output; a first pass transistor having a first current electrode for receiving

Assignees

Inventors

Classifications

  • G05F1/575Primary

    characterised by the feedback circuit · CPC title

  • G05F1/468Primary

    characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title

  • being transistors in series with the load · CPC title

  • using an operational amplifier as final control device · CPC title

  • including plural semiconductor devices as final control devices for a single load · CPC title

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What does patent US11467613B2 cover?
An adaptable LDO regulator includes an error amplifier providing an error voltage according to a difference between a feedback voltage and a reference voltage, first and second pass transistors each having a first current electrode for receiving an input voltage, a control electrode for receiving the error voltage, and a second current electrode, the second current electrode of the second pass …
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification G05F1/575. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 11 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).