Modular optical phased array

US11456532B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11456532-B2
Application numberUS-201715587391-A
CountryUS
Kind codeB2
Filing dateMay 4, 2017
Priority dateMay 4, 2016
Publication dateSep 27, 2022
Grant dateSep 27, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A phased array includes, in part, M×N photonic chips each of which includes, in part, an array of transmitters and an array of receivers. At least one of M and/or N is an integer greater than one. The transmitter arrays in each pair of adjacent photonics chips are spaced apart by a first distance and the receiver arrays in each pair of adjacent photonics chips are spaced apart by a second distance. The first and second distances are co-prime numbers. Optionally, at least a second subset of the M×N photonic chips is formed by rotating a first subset of the M×N photonic chips.

First claim

Opening claim text (preview).

What is claimed is: 1. A phased array comprising M×N photonic chips each comprising a two-dimensional array of transmitters disposed along a first plurality of rows and columns and a two-dimensional array of receivers disposed along a second plurality of rows and columns, wherein a distance between the transmitter arrays of each pair of adjacent photonics chips is defined by a first value and wherein a distance between the receiver arrays of each pair of adjacent photonics chips is defined by a second value, wherein the first and second values are co-prime numbers, and wherein at least one of M or N is an integer greater than one. 2. The phased array of claim 1 wherein a position of at least a second one of the M×N photonic chips is defined by a rotation about either an x-axis or y-axis of a first one of the M×N photonic chips. 3. The phased array of claim 1 wherein a distance between a transmitter array of a photonic chip and an edge of the photonic chip in which the transmitter array is disposed is substantially one half the first value. 4. The phased array of claim 1 wherein a distance between a receiver array of a photonic chip and an edge of the photonic chip in which the receiver array is disposed is substantially one half the second value. 5. A phased array comprising at least first and second phased array sub-blocks, each phased array sub-block comprising M×N photonic chips, each chip comprising a two-dimensional array of transmitters disposed along a first plurality of rows and columns, and a two-dimensional array of receivers disposed along a second plurality of rows and columns, wherein a distance between the transmitter arrays of each pair of adjacent photonics chips in each phased array sub-block is defined by a first value and wherein a distance between the receiver arrays of each pair of adjacent photonics chips in each phased array sub-block is defined by a second value, wherein the first and second values are co-prime numbers, and wherein at least one of M or N is an integer greater than one. 6. The phased array of claim 5 wherein a position of at least a second one of the M×N photonic chips in each phased array sub-block is defined by a rotation about either an x-axis or y-axis of a first one of the M×N photonic chips of the phased-array sub-block. 7. A phased array comprising: a first M transceivers disposed along a first plurality of rows and columns, wherein a distance between each pair of adjacent transceivers of the first M transceivers is defined by a first value; a second N transceiver arrays disposed along a second plurality of rows and columns, wherein a distance between each pair of adjacent transceivers of the second N transceivers is defined by a second value, wherein the first and second values are co-prime numbers, and wherein the first M transceivers and the second N transceivers include at least one common transceiver, and wherein at least one of M or N is an integer greater than one. 8. A method of forming a phased array, the method comprising: forming a first array of photonic chips each comprising a two-dimensional array of transmitters disposed along a first plurality of rows and columns and a two-dimensional array of receivers disposed along a second plurality of rows and columns, wherein a distance between the transmitter arrays of each pair of adjacent photonics chips is defined by a first value and wherein a distance between the receiver arrays of each pair of adjacent photonics chips is defined by a second value, wherein the first and second values are co-prime numbers. 9. The method of claim 8 wherein at least a second subset of the photonic chips is formed by rotating a first subset of the photonic chips. 10. The method of claim 8 wherein a distance between a transmitter array of a photonic chip and an edge of the photonic chip in which the transmitter array is disposed is substantially one half the first value. 11. The method of claim 10 wherein a distance between a receiver array of a photonic chip and an edge of the photonic chip in which the transmitter array is disposed is substantially one half the second value. 12. A method of forming a phased array, the method comprising: forming a first two-dimensional array of photonic chips each comprising a two-dimensional array of transmitters disposed along a first plurality of rows and columns, and a two-dimensional array of receivers disposed along a second plurality of rows and columns, wherein a distance between the transmitter arrays of each pair of adjacent photonics chips in the first array is defined by a first value and wherein a distance between the receiver arrays of each pair of adjacent photonics chips in the first array is defined by a second value, wherein the first and second values are co-prime numbers; and forming a second two-dimensional array of photonic chips each comprising a two-dimensional array of transmitters disposed along the first plurality of rows and columns, and a two-dimensional array of receivers disposed along the second plurality of rows and columns, wherein a distance between the transmitter arrays of each pair of adjacent photonics chips across the first or second array is defined by the first value and wherein a distance between the receiver arrays of each pair of adjacent photonics chips across the first and second array is defined by the second value. 13. A method of forming a phased array the method comprising: disposing a first M transceivers along a first plurality of rows and columns, wherein a distance between each pair of adjacent transceivers of the first M transceivers is defined by a first value; disposing a second N transceiver arrays along a second plurality of rows and columns, wherein a distance between each pair of adjacent transceivers of the second N transceivers is defined by a second value, wherein the first and second values are co-prime numbers, and wherein the first M transceivers and the second N transceivers include at least one common transceiver, and wherein at least one of M or N is an integer greater than one. 14. A method of forming a phased array, the method comprising: disposing M transmitters along a first plurality of rows and columns to form a first two-dimensional array; disposing N receivers along a second plurality of rows and columns to form a second two-dimensional array; and disposing a transceiver in the first and second arrays such that transceiver is common to both the first and second arrays, wherein a distance between each transmitter in the first array and an adjacent transmitter in the first array is defined by a first value, and wherein a distance between each receiver in the second array and an adjacent receiver in the second array is defined by a second value, wherein the first and second values are co-prime numbers, wherein each of the M transmitters in the first array and each of the N receivers in the second array is a transceiver photonic chip.

Assignees

Inventors

Classifications

  • H01Q3/2676Primary

    Optically controlled phased array · CPC title

  • Antenna units of the array energised non-uniformly in amplitude or phase, e.g. tapered array or binomial array · CPC title

  • Two dimensional planar arrays · CPC title

  • Apparatus or processes specially adapted for manufacturing antenna arrays (manufacturing waveguides H01P11/00) · CPC title

  • Patch antenna array · CPC title

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What does patent US11456532B2 cover?
A phased array includes, in part, M×N photonic chips each of which includes, in part, an array of transmitters and an array of receivers. At least one of M and/or N is an integer greater than one. The transmitter arrays in each pair of adjacent photonics chips are spaced apart by a first distance and the receiver arrays in each pair of adjacent photonics chips are spaced apart by a second dista…
Who is the assignee on this patent?
California Inst Of Techn
What technology area does this patent fall under?
Primary CPC classification H01Q3/2676. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 27 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).