System and method for providing an ethernet interface

Patent metadata

Field	Value
Publication number	US-11451600-B2
Application number	US-202016936580-A
Country	US
Kind code	B2
Filing date	Jul 23, 2020
Priority date	Dec 11, 2006
Publication date	Sep 20, 2022
Grant date	Sep 20, 2022

Abstract

In one embodiment, an apparatus includes n electrical communication channels, m optical communication media interfaces, and a plurality of muxes. The plurality of muxes are configured to receive an information stream. The information stream is carried over the n electrical communication channels and the m optical communication media interfaces. The plurality of muxes are further configured to transform the information stream from v virtual lanes. Each virtual lane includes a plurality of data blocks from the information stream and an alignment block, wherein v is a positive integer multiple of the least common multiple of m and n, v is greater than n, and n is equal to m.

First claim

What is claimed is:

1. An apparatus, comprising:
n electrical communication channels;
m optical communication media interfaces;
a plurality of muxes configured to:
receive an information stream, the information stream carried over the n electrical communication channels and the m optical communication media interfaces; and
transform the information stream from v virtual lanes, each virtual lane comprising a plurality of data blocks from the information stream and an alignment block, wherein:
v is a positive integer multiple of the least common multiple of m and n;
v is greater than n; and
n is equal to m; and

a plurality of virtual lane buffers, wherein:
each of the plurality of virtual lane buffers is sized based on an amount of skew expected from electrical and optical components; and
the size of each of the plurality of virtual lane buffers is determined prior to the electrical and optical components generating skew.

2. The apparatus of claim 1 , wherein:
v is less than or equal to twenty;
each virtual lane comprises an alignment pattern; and
the alignment patterns are fixed.

3. The apparatus of claim 1 , wherein:
v is greater than twenty;
each virtual lane comprises an alignment pattern; and
the alignment patterns are different.

4. The apparatus of claim 1 , further configured to:
identify, in a buffer, the alignment block associated with the virtual lane; and
recreate an original data stream using, at least in part, the alignment block.

5. The apparatus of claim 1 , wherein each of the n electrical communication channels comprises a SerDes interface operating at least 5 Gigabits per second.

6. The apparatus of claim 1 , wherein each of the m optical communication media interfaces is configured to receive a different stream of information over a single optical fiber.

7. The apparatus of claim 1 , further comprising one or more decoding modules for decoding the information stream into the plurality of data blocks using 64 B/66 B encoding.

8. A method, comprising:
receiving an information stream, the information stream carried over n electrical communication channels and m optical communication media interfaces;
transforming the information stream from v virtual lanes, each virtual lane comprising a plurality of data blocks from the information stream and an alignment block, wherein:
v is a positive integer multiple of the least common multiple of m and n;
v is greater than n; and
n is equal to m; and

a plurality of virtual lane buffers, wherein:
each of the plurality of virtual lane buffers is sized based on an amount of skew expected from electrical and optical components; and
the size of each of the plurality of virtual lane buffers is determined prior to the electrical and optical components generating skew.

9. The method of claim 8 , wherein:
v is less than or equal to twenty;
each virtual lane comprises an alignment pattern; and
the alignment patterns are fixed.

10. The method of claim 8 , wherein:
v is greater than twenty;
each virtual lane comprises an alignment pattern; and
the alignment patterns are different.

11. The method of claim 8 , further comprising:
identifying, in a buffer, the alignment block associated with the virtual lane; and
recreating an original data stream using, at least in part, the alignment block.

12. The method of claim 8 , wherein each of the electrical communication channels comprises a SerDes interface operating at least 5 Gigabits per second.

13. The method of claim 8 , wherein each of them optical communication media interfaces is configured to receive a different stream of information over a single optical fiber.

14. The method of claim 8 , further comprising decoding, by one or more decoding modules, the information stream into the plurality of data blocks using 64 B/66 B encoding.

15. A system, comprising:
a receiver for receiving an information stream, the information stream carried over n electrical communication channels and m optical communication media interfaces;
one or more muxes for transforming the information stream from v virtual lanes, each virtual lane comprising a plurality of data blocks from the information stream and an alignment block, wherein:
v is a positive integer multiple of the least common multiple of m and n;
v is greater than n; and
n is equal to m; and

a plurality of virtual lane buffers, wherein:
each of the plurality of virtual lane buffers is sized based on an amount of skew expected from electrical and optical components; and
the size of each of the plurality of virtual lane buffers is determined prior to the electrical and optical components generating skew.

16. The system of claim 15 , wherein:
v is less than or equal to twenty;
each virtual lane comprises an alignment pattern; and
the alignment patterns are fixed.

17. The system of claim 15 , wherein:
v is greater than twenty;
each virtual lane comprises an alignment pattern; and
the alignment patterns are different.

18. The system of claim 15 , further comprising:
one or more muxes for identifying, in the buffer, the alignment block associated with the virtual lane; and
one or more muxes for recreating an original data stream using, at least in part, the alignment block;
wherein transforming the information stream from v virtual lanes comprises recreating the original data stream using, at least in part, the alignment block.

19. The system of claim 15 , wherein each of the electrical communication channels comprises a SerDes interface operating at least 5 Gigabits per second.

20. The system of claim 15 , wherein each of the m optical communication media interfaces is configured to receive a different stream of information over a single optical fiber.

Assignees

• Cisco Tech Inc

Inventors

• Gustlin Mark A
• Trainin Oded
• Della Chiesa Luca

Classifications

• H04L47/10

  Flow control; Congestion control · CPC title

• H04L47/13 Primary

  in a LAN segment, e.g. ring or bus · CPC title

• H04L47/39

  Credit based · CPC title

• H04B10/516

  Details of coding or modulation · CPC title

• H04J14/02

  Wavelength-division multiplex systems · CPC title