Devices and methods for offset cancellation

Patent metadata

Field	Value
Publication number	US-11444580-B2
Application number	US-202016837783-A
Country	US
Kind code	B2
Filing date	Apr 1, 2020
Priority date	Apr 1, 2020
Publication date	Sep 13, 2022
Grant date	Sep 13, 2022

Abstract

An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.

First claim

What is claimed is:

1. An offset-cancellation circuit comprising:
a first amplification stage comprising a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier and configured to be coupled and decoupled from the first amplifier, the offset voltage comprising a difference between a first output of the first amplifier and a second output of the first amplifier when a first input of the first amplifier and a second input of the first amplifier are coupled to a common mode;
a storage element configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage, the potential difference being determined by the offset voltage of the first amplifier and the gain of the first amplification stage; and
a second amplification stage coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current, the offset-cancellation current being determined by the potential difference and a gain of the second amplification stage.

2. The offset-cancellation circuit of claim 1 , wherein the first input of the first amplifier is coupled to the common mode by a common mode switch.

3. The offset-cancellation circuit of claim 1 , further comprising a second amplifier; and wherein a first input of the second amplifier is coupled to the first output of the first amplifier and a second input of the second amplifier is coupled to the second output of the first amplifier.

4. The offset-cancellation circuit of claim 3 , further comprising a latch coupled to a first output of the second amplifier and coupled to a second output of the second amplifier.

5. The offset-cancellation circuit of claim 1 , wherein a first input of the first amplification stage is coupled to the first output of the first amplifier and a second input of the first amplification stage coupled to the second output of the first amplifier to receive the offset voltage.

6. The offset-cancellation circuit of claim 5 , wherein the first input of the first amplification stage is configured to be decoupled from the first output of the first amplifier and the second input of the first amplification stage is configured to be decoupled from the second output of the first amplifier when the storage element is decoupled from the first amplification stage.

7. The offset-cancellation circuit of claim 1 , wherein a first output of the second amplification stage is coupled with the first output of the first amplifier and a second output of the second amplification stage is coupled with the second output of the first amplifier to deliver the offset-cancellation current and wherein the offset-cancellation circuit comprises a first current at the first output of the second amplification stage and a second current at the second output of the second amplification stage.

8. The offset-cancellation circuit of claim 7 wherein:
the storage element comprises a first capacitor and a second capacitor; and
the second amplification stage comprises:
a first transistor comprising a gate, a drain, and a source, the gate of the first transistor being coupled to a first plate of the first capacitor, the drain of the first transistor being coupled to the first output of the second amplification stage, and the source of the first transistor being coupled to a current supply; and
a second transistor comprising a gate, a drain, and a source, the gate of the second transistor being coupled to a first plate of the second capacitor, the drain of the second transistor being coupled to the second output of the second amplification stage, and the source of the second transistor being coupled to the current supply.

9. The offset-cancellation circuit of claim 8 , wherein the storage element is configured to be coupled to and decoupled from the first amplification stage by a first switch and a second switch, the first switch being disposed between a first output of the first amplification stage and the first plate of the first capacitor and the second switch being disposed between a second output of the first amplification stage and the first plate of the second capacitor.

10. The offset-cancellation circuit of claim 9 , wherein the first switch is configured to receive a first control signal to toggle the first switch between open and closed states and the second switch is configured to receive a second control signal to toggle the second switch between open and closed states.

11. An offset-cancellation circuit comprising:
an input amplifier comprising a first input, a second input, a first output, and a second output;
a pre-storage amplifier comprising a first input and a second input;
a post-storage amplifier comprising a first input coupled with a first plate of a first storage capacitor and comprising a second input coupled with a first plate of a second storage capacitor;
wherein in a first state of the offset-cancellation circuit:
the first input of the input amplifier and the second input of the input amplifier are coupled to a common mode to produce a voltage offset between the first output of the input amplifier and the second output of the input amplifier;
the first input of the pre-storage amplifier is coupled to the first output of the input amplifier and the second input of the pre-storage amplifier is coupled to the second output of the input amplifier;
the first plate of the first storage capacitor is coupled with a first output of the pre-storage amplifier and the first plate of the second storage capacitor is coupled with a second output of the pre-storage amplifier; and
wherein a first potential is stored on the first storage capacitor and a second potential is stored on the second storage capacitor, a difference between the first potential and the second potential being proportional to the voltage offset; and

wherein in a second state of the offset-cancellation circuit:
the first input of the pre-storage amplifier is de-coupled to the first output of the input amplifier and the second input of the pre-storage amplifier is de-coupled to the second output of the input amplifier;
the first plate of the first storage capacitor is decoupled from the first output of the pre-storage amplifier;
the first plate of the second storage capacitor is decoupled from the second output of the pre-storage amplifier; and
a first output of the post-storage amplifier is coupled with the first output of the input amplifier and a second output of the post-storage amplifier is coupled with the second output of the input amplifier to provide a first offset-cancellation current to the first output of the input amplifier and a second offset-cancellation current to the second output of the input amplifier, the first offset-cancellation current and the second offset-cancellation current determined by the first potential and by the second potential.

12. The offset-cancellation circuit of claim 11 , further comprising:
a first switch coupling the first plate of the first storage capacitor and the first output of the pre-storage amplifier in the first state and decoupling the first plate of the first storage capacitor and the first output of the pre-storage amplifier in the second state; and
a second switch coupling the first plate of the second storage capacitor and the second output of the pre-storage amplifier in the first state and decoupling the first plate of the second storage capacitor and the second output of the pre-storage amplifier in the second state.

Assignees

• St Microelectronics Int Nv

Inventors

• Biswas Riju

Classifications

• H03F3/45475 Primary

  using IC blocks as the active amplifying circuit · CPC title

• H03F2200/234

  the input amplifying stage being one or more operational amplifiers · CPC title

• H03F2203/45044

  One or more switches are opened or closed to balance the dif amp to reduce the offset of the dif amp · CPC title

• H03F2200/231

  the input of an amplifier can be switched on or off by a switch to amplify or not an input signal · CPC title

• H03F2200/375

  Circuitry to compensate the offset being present in an amplifier · CPC title