Super-linear power amplifiers with adaptive biasing

Patent metadata

Field	Value
Publication number	US-11444579-B2
Application number	US-201816958032-A
Country	US
Kind code	B2
Filing date	Dec 17, 2018
Priority date	Dec 29, 2017
Publication date	Sep 13, 2022
Grant date	Sep 13, 2022

Abstract

In one aspect, a power amplifier apparatus comprising a power amplifier (PA) and an adaptive controller is provided. The PA comprises at least one transistor and the adaptive controller is configured to control a bias voltage of the transistor based on a measured power efficiency of the PA and a measure output signal quality of the PA. In another aspect, a method of optimizing PA performance is provided. The PA comprises at least one transistor and the method includes initializing a bias voltage of the transistor, receiving measurements indicating a power efficiency and an output signal quality of the PA, evaluating the received measurements, calculating a new bias voltage for the transistor based on the evaluation, and applying the calculated new bias voltage to the transistor.

First claim

The invention claimed is:

1. A power amplifier apparatus comprising:
a power amplifier (PA) comprising at least one transistor;
an adaptive controller configured to control a bias voltage of the transistor based on a measured power efficiency of the PA and a measured output signal quality of the PA; and
a signal quality monitor configured to:
receive at least a portion of an output signal of the PA;
measure the output signal quality of the PA at least based on the received portion of the output signal of the PA and using at least one of: (i) error vector magnitude (EVM) or (ii) operating-band unwanted emission; and
feed the measured output signal quality of the PA to the adaptive controller.

2. The power amplifier apparatus of claim 1 , wherein the PA comprises a plurality of transistors in a configuration of one of: (i) a multi-way Doherty PA, (ii) a multi-stage Doherty PA, (iii) a travelling-wave PA, and (iv) a derivative superposition PA.

3. The power amplifier apparatus of claim 2 , wherein the multi-way Doherty PA comprises:
a main transistor; and
one or more auxiliary transistors, wherein the one or more auxiliary transistors are configured to simultaneously switch on with a gain expansion to compensate for gain compression of the main transistor.

4. The power amplifier apparatus of claim 2 , wherein the multi-stage Doherty PA comprises:
a main transistor;
one or more auxiliary transistors, wherein the one or more auxiliary transistors are configured to sequentially switch on with a gain expansion to compensate for gain compression of the main transistor.

5. The power amplifier apparatus of claim 2 , wherein the travelling-wave PA is configured to operate in a broad bandwidth and comprises:
a first transistor with a first bias condition; and
a second transistor with a second bias condition, wherein the first bias condition and the second bias condition are configured such that the compression distortion of the first transistor is cancelled by the expansion distortion of the second transistor.

6. The power amplifier apparatus of claim 2 , wherein the derivative superposition PA comprises:
a first transistor with a first bias condition; and
a second transistor with a second bias condition, wherein the first bias condition and the second bias condition are configured such that the distortions from the first and the second transistor cancel each other.

7. The power amplifier apparatus of claim 5 , wherein the first bias condition induces an amplitude compression and the second bias condition induces an amplitude expansion.

8. The power amplifier apparatus of claim 5 , wherein the first bias condition induces a phase lead and the second bias condition induces a phase lag.

9. The power amplifier apparatus of claim 1 , wherein the signal quality monitor is configured to measure the output signal quality of the PA using error vector magnitude (EVM).

10. The power amplifier apparatus of claim 1 , wherein the signal quality monitor is further configured to demodulate the portion of the output signal of the PA into a constellation diagram to measure the output signal quality of the PA using the EVM.

11. The power amplifier apparatus of claim 1 , wherein the signal quality monitor comprises a frequency sweeping narrow band receiver configured to measure the output signal quality of the PA.

12. The power amplifier apparatus of claim 1 , wherein the signal quality monitor comprises a band-limited power meter configured to measure the operating-band unwanted emission.

13. The power amplifier apparatus of claim 1 , further comprising:
an efficiency monitor configured to:
receive at least a portion of an output signal of the PA;
measure an output signal power of the PA at least based on the received portion of the output signal of the PA;
measure a direct current (DC) power consumption of the PA;
determine the measured power efficiency of the PA at least based on the measured output signal power of the PA and the measured DC power consumption of the PA; and
feed the measured power efficiency of the PA to the adaptive controller.

14. The power amplifier apparatus of claim 1 , wherein the adaptive controller is configured to control the bias voltage of the transistor based on the measured power efficiency of the PA and the measured output signal quality of the PA by performing a process comprising:
evaluating the measured power efficiency of the PA and the measured output signal quality of the PA;
calculating a new bias voltage for the transistor based on the measured power efficiency of the PA and the measured output signal quality of the PA; and
applying the calculated new bias voltage to the transistor.

15. The power amplifier apparatus of claim 14 , wherein the adaptive controller is configured to calculate the new bias voltage by performing a process comprising:
employing at least one or more of: a gradient descent algorithm, a Gauss-Newton algorithm, a Levenberg-Marquardt algorithm, and a simultaneous perturbation stochastic approximation (SPSA) algorithm.

16. The power amplifier apparatus of claim 14 , further comprising:
a bias control circuit connected to the transistor and the adaptive controller, wherein the adaptive controller is configured to apply the calculated new bias voltage to the transistor via the bias control circuit.

17. The power amplifier apparatus of claim 1 , wherein the signal quality monitor is further configured to measure the output signal quality of the PA using adjacent channel leakage ratio (ACLR).

18. The power amplifier apparatus of claim 1 , wherein the signal quality monitor is configured to measure the output signal quality of the PA using operating-band unwanted emission.

19. A method of optimizing a power amplifier (PA) performance, wherein the power amplifier comprises at least one transistor, the method comprising:
initializing a bias voltage of the transistor;
receiving a first measurement indicating a power efficiency of the PA;
receiving a second measurement indicating an output signal quality of the PA, wherein the second measurement is measured using at least one of: (i) error vector magnitude (EVM) or (ii) operating-band unwanted emission;
evaluating the first and second measurement;
calculating a new bias voltage for the transistor based on the evaluation of the first and second measurement; and
applying the calculated new bias voltage for the transistor.

20. The method of claim 19 , wherein the first measurement indicating the power efficiency of the PA is measured at least based on a portion of an output signal of the PA and a direct current (DC) power consumption of the PA.

21. The method of claim 19 , wherein the second measurement indicating the output signal quality of the PA is measured at least based on a portion of an output signal of the PA.

22. The method of 18 further comprising:
receiving the second measurement indicating an output signal quality of the PA wherein the second measurement is measured using error vector magnitude.

23. The method of 18 further comprising:
receiving the second measurement indicating an output signal quality of the PA wherein the second measurement is measured using adjacent channel leakage ratio (ACLR) and one of EVM or operating-band unwanted emission.

24. The method of 18 further comprising:
receiving the second measurement indicating an output signal quality of the PA wherein the second measurement

Assignees

• Ericsson Telefon Ab L M

Inventors

• Hou Rui
• Bleker Andre
• Ridell Virtanen Lars

Classifications

• H03F3/193

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F2200/105

  A non-specified detector of the power of a signal being used in an amplifying circuit · CPC title

• H03F3/58

  using travelling-wave tubes · CPC title

• H03F2200/465

  Power sensing · CPC title

• H03F3/24

  of transmitter output stages · CPC title