Signal processing circuit, radio frequency signal transmitter, and communications device

US11444362B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11444362-B2
Application numberUS-202016908321-A
CountryUS
Kind codeB2
Filing dateJun 22, 2020
Priority dateDec 22, 2017
Publication dateSep 13, 2022
Grant dateSep 13, 2022

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  1. Title

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  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of this application disclose a signal processing circuit, a radio frequency signal transmitter, and a communications device, and relate to the field of electronic device technologies, to improve power amplification efficiency of the signal processing circuit. The signal processing circuit includes: a splitter, a radio frequency signal converter, a first branch power amplifier, a second branch power amplifier, and a combiner. The splitter is connected to the radio frequency signal converter, the radio frequency signal converter is connected to the first branch power amplifier and the second branch power amplifier, and the first branch power amplifier and the second branch power amplifier are connected to the combiner.

First claim

Opening claim text (preview).

What is claimed is: 1. A signal processing circuit, comprising a splitter, a radio frequency signal converter, a first branch power amplifier, a second branch power amplifier, and a combiner, wherein the splitter is directly connected to the radio frequency signal converter, the radio frequency signal converter is directly connected to the first branch power amplifier and the second branch power amplifier, and the first branch power amplifier and the second branch power amplifier are directly connected to the combiner, wherein at least one of the first branch power amplifier or the second branch power amplifier comprises a Doherty power amplifier; the splitter is configured to: receive a first digital signal, split the first digital signal into at least one first branch digital signal and at least one second branch digital signal based on an input power of the first digital signal, and output the at least one first branch digital signal and the at least one second branch digital signal to the radio frequency signal converter, wherein at least one of a ratio of an amplitude of the at least one first branch digital signal to an amplitude of the at least one second branch digital signal, or a phase difference between the at least one first branch digital signal and the at least one second branch digital signal varies with the input power of the first digital signal; the radio frequency signal converter is configured to: convert the at least one first branch digital signal and the at least one second branch digital signal into at least one first branch radio frequency signal and at least one second branch radio frequency signal, and output the at least one first branch radio frequency signal and the at least one second branch radio frequency signal; the first branch power amplifier is configured to: amplify the received at least one first branch radio frequency signal, and output the amplified at least one first branch radio frequency signal to the combiner; the second branch power amplifier is configured to: amplify the received at least one second branch radio frequency signal, and output the amplified at least one second branch radio frequency signal to the combiner; and the combiner is configured to: receive at least one output signal output by the first branch power amplifier and at least one output signal output by the second branch power amplifier, adjust, based on the at least one output signal output by the second branch power amplifier, the at least one output signal output by the first branch power amplifier, and output the adjusted at least one output signal. 2. The signal processing circuit according to claim 1 , wherein the first branch power amplifier comprises a first signal splitter connected to at least two first power sub-amplifiers, the first signal splitter comprises an input port connected to the radio frequency signal converter, and is configured to: receive one of the at least one first branch radio frequency signal, wherein at least two output ports of the first signal splitter are connected to one of the at least two first power sub-amplifier; split the first branch radio frequency signal into at least two radio frequency signals; and output the at least two radio frequency signals. 3. The signal processing circuit according to claim 1 , wherein the second branch power amplifier comprises a second signal splitter connected to at least two second power sub-amplifiers; the second signal splitter comprises an input port connected to the radio frequency signal converter, and is configured to: receive one of the at least one second branch radio frequency signal, wherein at least two output ports of the second signal splitter are connected to one of the at least two second power sub-amplifier; split one second branch radio frequency signal into at least two radio frequency signals; and output the at least two radio frequency signals. 4. The signal processing circuit according to claim 1 , wherein the first branch power amplifier comprises at least one first power sub-amplifier, the at least one first power sub-amplifier each comprises an input port connected to the radio frequency signal converter, and are configured to receive one first branch radio frequency signal. 5. The signal processing circuit according to claim 1 , wherein the second branch power amplifier comprises at least one second power sub-amplifier, the at least one second power sub-amplifier each comprises an input port connected to the radio frequency signal converter, and are configured to receive one second branch radio frequency signal. 6. The signal processing circuit according to claim 1 , wherein the combiner comprises a three-port device, the first branch power amplifier comprises one output port, and the second branch power amplifier comprises one output port; a first port of the three-port device is connected to the output port of the first branch power amplifier, and the first branch power amplifier is configured to: amplify the received at least one first branch radio frequency signal, and output the amplified at least one first branch radio frequency signal to the first port of the three-port device; a third port of the three-port device is connected to the output port of the second branch power amplifier, and the second branch power amplifier is configured to: amplify the received at least one second branch radio frequency signal, and output the amplified at least one second branch radio frequency signal to the third port of the three-port device; and the three-port device is configured to: adjust, based on the signal received through the third port, the signal received through the first port, and output the signal through a second port of the three-port device. 7. The signal processing circuit according to claim 6 , wherein the three-port device comprises a circulator. 8. The signal processing circuit according to claim 6 , wherein the three-port device comprises a first isolator and a second isolator; an input port of the first isolator is connected to the first port of the three-port device, and an output port of the first isolator is connected to the second port of the three-port device; an input port of the second isolator is connected to the third port of the three-port device, and an output port of the second isolator is connected to the first port of the three-port device; the second isolator is configured to transmit the signal received through the third port of the three-port device to the input port of the first isolator; and the first isolator is configured to adjust, based on the signal received through the third port of the three-port device, the signal received through the first port of the three-port device, and output the signal through the second port of the three-port device. 9. The signal processing circuit according to claim 1 , wherein the combiner comprises a four-port device; the first branch power amplifier comprises a first output port and a second output port; and the second branch power amplifier comprises one output port; the first output port of the first branch power amplifier is connected to a first port of the four-port device; the second output port of the first branch power amplifier is connected to a second port of the four-port device; and the output port of the second branch power amplifier is connected to a third port of the four-port device; the first branch power amplifier is configured to: receive at least two first branch radio frequency signals; and amplify the received at least two first branch radio frequency signals, and separately output the at least two amplified first branch radio frequency signals to the first port and the second port of

Assignees

Inventors

Classifications

  • H03F1/0288Primary

    using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

  • Shaping networks in transmitter or receiver, e.g. adaptive shaping networks · CPC title

  • A non-specified detector of a signal envelope being used in an amplifying circuit · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

  • using vector summing of two or more constant amplitude phase-modulated signals · CPC title

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Frequently asked questions

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What does patent US11444362B2 cover?
Embodiments of this application disclose a signal processing circuit, a radio frequency signal transmitter, and a communications device, and relate to the field of electronic device technologies, to improve power amplification efficiency of the signal processing circuit. The signal processing circuit includes: a splitter, a radio frequency signal converter, a first branch power amplifier, a sec…
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03F1/0288. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 13 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).