Physical and logical detections for fraud and tampering

US11443318B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11443318-B2
Application numberUS-201916666311-A
CountryUS
Kind codeB2
Filing dateOct 28, 2019
Priority dateFeb 12, 2016
Publication dateSep 13, 2022
Grant dateSep 13, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A payment terminal may include payment interfaces to receive payment information from payment devices such as chip cards and NFC payment devices. Monitoring components may monitor these payment interfaces. In addition, test requests may be transmitted to a payment device in order to elicit responses. The monitored information and the responses may be used by the payment terminal to determine whether a transaction is fraudulent or if a tamper attempt is ongoing, based on local test criteria. In addition, the monitored information and responses may be provided to a server, which may store the monitored information and responses, test for fraudulent transactions and tamper attempts based on server test criteria, and determine updates to the local test criteria.

First claim

Opening claim text (preview).

What is claimed is: 1. A payment processing system for detecting attempts to engage in fraudulent payment transactions, the payment processing system comprising: a payment reader, comprising: a contact interface configured to receive a chip card, wherein the contact interface includes an input/output line configured to send an output signal and receive an input signal; a contact monitoring component coupled to the input/output line and configured to provide an analog monitoring voltage corresponding to voltages of the output signal and the input signal, the contact monitoring component comprising at least one sensor to measure the analog monitoring voltage; an analog-to-digital converter coupled to the at least one sensor and configured to convert the analog monitoring voltage to a digital monitoring signal; a payment reader processing unit configured to generate requests for the chip card, provide the output signal based on the requests to the chip card via the contact interface, receive the input signal from the chip card via the contact interface, and determine responses from the chip card based on the input signal, wherein one or more of the requests comprise test requests, wherein the payment reader processing unit is configured to determine electrical characteristics of the contact interface based on the digital monitoring signal and to monitor the responses from the chip card and timing of the responses from the chip card, wherein the payment reader processing unit is configured to take a first corrective action based on a comparison of local test criteria to one or more of the electrical characteristics of the contact interface, the monitored responses from the chip card, and the monitored timing of the responses from the chip card, and wherein the payment reader processing unit is configured to generate a server request message including the electrical characteristics of the contact interface, the monitored responses from the chip card, and the monitored timing of the responses from the chip card; and a first communication interface, wherein the payment reader is configured to transmit the server request message via the first communication interface; and a payment service system, comprising: a second communication interface; a transaction database comprising records of previous responses from previous payment transactions, previous monitored timing for the previous payment transactions, and previous electrical characteristics of the contact interface for the previous payment transactions; and a payment service system processing unit configured to receive the server request message via the second communication interface, wherein the payment service system processing unit is configured to extract, from the server request message, the electrical characteristics of the contact interface, the monitored timing of the responses from the chip card, and the monitored responses from the chip card, wherein the payment service system processing unit is configured to generate a system response message based on a comparison of server test criteria to one or more of the electrical characteristics of the contact interface, the monitored responses from the chip card, and the monitored timing of the responses from the chip card, wherein the payment service system processing unit is configured to transmit the system response message to the payment reader via the second communication interface and the first communication interface, wherein the payment reader processing unit is configured to take a second corrective action based on the system response message, and wherein the payment service system processing unit is configured to update the server test criteria based on the electrical characteristics of the contact interface, the monitored responses from the chip card, the monitored timing of the responses from the chip card, the previous electrical characteristics of the contact interface, the previous responses, and the previous monitored timing. 2. The payment processing system of claim 1 , wherein the payment service system processing unit is further configured to update the local test criteria based on the electrical characteristics of the contact interface, the monitored responses from the chip card, the monitored timing of the responses from the chip card, the previous electrical characteristics of the contact interface, the previous responses, and the previous monitored timing, wherein the payment service system processing unit is configured to generate an update message including the updated local test criteria and transmit the update message to the payment reader via the second communication interface and the first communication interface, and wherein payment reader processing unit is configured to update the local test criteria based on the update message. 3. The payment processing system of claim 2 , wherein the payment service system processing unit is further configured to receive information indicating that a previous payment transaction corresponds to a false positive or a false negative, to store information relating the false positive or the false negative to the previous payment transaction at the transaction database, and to update the server test criteria and the local test criteria based on the false positive or the false negative. 4. The payment processing system of claim 1 , wherein the payment reader processor is configured to abort a transaction or query the chip card as the first corrective action, and to remove power from one or more components of the payment reader, disable one or more components of the payment reader, or employ countermeasures at the payment reader as the second corrective action. 5. A payment terminal, comprising: a payment interface configured to interface with a payment device; a monitoring component coupled to the payment interface and comprising at least one sensor configured to provide a measurement related to the payment interface; a processing unit configured to generate requests for the payment device, provide the requests to the payment device via the payment interface, and receive responses from the payment device via the payment interface, wherein the processing unit is connected to the monitoring component to receive a monitoring signal corresponding to the measurement from the sensor and determine electrical characteristics of the payment interface based on the monitoring signal, and wherein the processing unit is configured to take a first corrective action based on a comparison of one or more of the responses from the payment device and the electrical characteristics of the payment interface to local test criteria; and a communication interface, wherein the processing unit is configured to generate a server request message based on the responses from the payment device and the electrical characteristics of the payment interface, transmit the server request message via the communication interface, receive a server response message via the communication interface, and determine whether to take a second corrective action based on the server response message. 6. The payment terminal of claim 5 , wherein the processing unit is further configured to monitor timing for the responses from the payment device based on the electrical characteristics of the payment interface and determine whether to take the first corrective action based on a comparison of the monitored timing to the local test criteria, and wherein the server request message is based on the responses from the payment device, the electrical characteristics of the payment interface, and the monitored timing. 7. The payment terminal of claim 5 , wherein the payment interface comprises a contact interface, wherein the contact interface is configured to receive a chip card, wher

Assignees

Inventors

Classifications

  • RFID or NFC payments by means of M-devices · CPC title

  • Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication · CPC title

  • Active cards, i.e. cards including their own processing means, e.g. including an IC or chip · CPC title

  • involving fraud or risk level assessment in transaction processing · CPC title

  • Detection or prevention of fraud · CPC title

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Frequently asked questions

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What does patent US11443318B2 cover?
A payment terminal may include payment interfaces to receive payment information from payment devices such as chip cards and NFC payment devices. Monitoring components may monitor these payment interfaces. In addition, test requests may be transmitted to a payment device in order to elicit responses. The monitored information and the responses may be used by the payment terminal to determine wh…
Who is the assignee on this patent?
Block Inc
What technology area does this patent fall under?
Primary CPC classification G06Q20/4016. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 13 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).