Resistive switching memory device based on multi-inputs

US11437570B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11437570-B2
Application numberUS-202016932029-A
CountryUS
Kind codeB2
Filing dateJul 17, 2020
Priority dateAug 16, 2019
Publication dateSep 6, 2022
Grant dateSep 6, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A resistive switching memory device according to an exemplary embodiment includes: a first electrode; a second electrode formed to be separated from the first electrode; and an insulating layer formed near the first electrode and the second electrode, and changed to one of a high resistance state and a low resistance state when a conductive filament is controlled by a change of external humidity or a voltage applied through the first electrode or the second electrode.

First claim

Opening claim text (preview).

What is claimed is: 1. A resistive switching memory device comprising: a first electrode; a second electrode formed to be separated from the first electrode; and an insulating layer formed near the first electrode and the second electrode, and changed to one of a high resistance state and a low resistance state when a conductive filament is controlled by a change of external humidity or a voltage applied through the first electrode or the second electrode, wherein when the external humidity becomes equal to or greater than a predetermined write humidity value, the insulating layer is changed to the low resistance state as the conductive filament is formed by allowing hydrogen ions that increase corresponding to conductivity of hydrogen ions increasing on the insulating layer to lower an oxidization/reduction potential of metal ions. 2. The resistive switching memory device of claim 1 , wherein in the low resistance state, the insulating layer maintains the low resistance state when the external humidity changes to one humidity value in a range of a predetermined erase humidity value to the write humidity value. 3. The resistive switching memory device of claim 2 , wherein when the external humidity becomes equal to or less than the erase humidity value, the conductive filament becomes disconnected and the insulating layer is changed to the high resistance state. 4. The resistive switching memory device of claim 1 , wherein when a positive voltage that is equal to or greater than a predetermined write voltage level is applied to the first electrode, the conductive filament is formed, and the insulating layer is changed to the low resistance state. 5. The resistive switching memory device of claim 1 , wherein when a negative voltage that is equal to or less than a predetermined erase voltage level is applied to the first electrode, the conductive filament becomes disconnected and the insulating layer is changed to a high resistance state. 6. The resistive switching memory device of claim 1 , wherein the first electrode is formed on an upper side of the insulating layer, and the second electrode is formed on a lower side of the insulating layer. 7. The resistive switching memory device of claim 1 , wherein the first electrode and the second electrode are formed on an upper side or a lower side of the insulating layer. 8. A resistive switching memory device comprising: a first electrode; a second electrode formed to be separated from the first electrode; and an insulating layer formed near the first electrode and the second electrode, and changed to one of a high resistance state and a low resistance state when a conductive filament is controlled by a change of external humidity. 9. The resistive switching memory device of claim 8 , wherein when the external humidity becomes equal to or greater than a predetermined write humidity value, the insulating layer is changed to the low resistance state as the conductive filament is formed by allowing hydrogen ions that increase corresponding to conductivity of hydrogen ions increasing on the insulating layer to lower an oxidization/reduction potential of metal ions. 10. The resistive switching memory device of claim 9 , wherein in the low resistance state, the insulating layer maintains the low resistance state when the external humidity is changed to one humidity value in a range of a predetermined erase humidity value to the write humidity value. 11. The resistive switching memory device of claim 10 , wherein the conductive filament becomes disconnected and the insulating layer is changed to the high resistance state when the external humidity becomes equal to or less than the erase humidity value. 12. The resistive switching memory device of claim 8 , wherein the insulating layer includes a tyrosine-based peptide material with at least one peptide bond.

Assignees

Inventors

Classifications

  • Writing or programming circuits or methods · CPC title

  • RRAM elements whose operation depends upon chemical change · CPC title

  • comprising bio-molecules · CPC title

  • Electricity · mapped topic

  • H01L45/085Primary

    Electricity · mapped topic

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What does patent US11437570B2 cover?
A resistive switching memory device according to an exemplary embodiment includes: a first electrode; a second electrode formed to be separated from the first electrode; and an insulating layer formed near the first electrode and the second electrode, and changed to one of a high resistance state and a low resistance state when a conductive filament is controlled by a change of external humidit…
Who is the assignee on this patent?
Yonsei Univ Univ Industry Foundation Uif, Seoul Nat Univ R&Db Foundation, Yonsei Univ Univ—Industry Foundation Uif
What technology area does this patent fall under?
Primary CPC classification G11C13/0009. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 06 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).