Wafer scale bonded active photonics interposer

Patent metadata

Field	Value
Publication number	US-11435523-B2
Application number	US-202016909557-A
Country	US
Kind code	B2
Filing date	Jun 23, 2020
Priority date	Apr 27, 2017
Publication date	Sep 6, 2022
Grant date	Sep 6, 2022

Abstract

There is set forth herein an optoelectrical system comprising: a conductive path for supplying an input voltage to a photonics device, wherein the conductive path comprises a base structure through via extending through a substrate and a photonics structure through via, the photonics structure through via extending through a photonics device dielectric stack. There is set forth herein an optoelectrical system comprising: a second structure fusion bonded to an interposer base dielectric stack of a first structure. There is set forth herein a method comprising: fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer based structure; and wafer scale bonding the second wafer built structure to a first wafer built structure.

First claim

What is claimed is:

1. An optoelectrical system comprising:
a first structure defining an interposer base structure and having a substrate, an interposer base dielectric stack and interposer base structure through vias extending through the substrate;
a second structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second structure, wherein the second structure is bonded to the interposer base dielectric stack of the first structure; and
a conductive path for supplying an input voltage to the photonics device, wherein the conductive path comprises a base structure through via of the interposer base structure through vias extending through the substrate and a photonics structure through via of the second structure, the photonics structure through via extending through the photonics device dielectric stack of the second structure, wherein the photonics structure through via has a bottom elevation defined at a metallization layer of the base structure dielectric stack.

2. The optoelectrical system of claim 1 , wherein the photonics structure through via of the second structure has a smaller diameter than an interposer base structure through via of the interposer base structure through vias.

3. The optoelectrical system of claim 1 , wherein the interposer base dielectric stack has integrated therein a contact via and a metallization layer, the contact via and the metallization layer further defining the conductive path for supplying the input voltage to the photonics device.

4. The optoelectrical system of claim 1 , wherein the interposer base dielectric stack has integrated therein first horizontal wiring in contact with a through via of the interposer base structure through vias, a contact via contacting the first horizontal wiring, and second horizontal wiring contacting the contact via, the first horizontal wiring, the contact via and the second horizontal wiring further defining the conductive path for supplying the input voltage to the photonics device.

5. The optoelectrical system of claim 1 , wherein the photonics device dielectric stack of the second structure has integrated therein horizontal wiring extending at an elevation above a top elevation of the photonics device, the horizontal wiring further defining the conductive path for supplying the input voltage to the photonics device.

6. The optoelectrical system of claim 1 ,
wherein the second structure is fusion bonded to the interposer base dielectric stack of the first structure.

7. The optoelectrical system of claim 6 , wherein the first structure includes a first through via, wherein the second structure includes a photonics structure through via, wherein the photonics structure through via defines a conductive path with the first through via and includes a diameter smaller than a diameter than an interposer base structure through via of the interposer base structure through vias.

8. The optoelectrical system of claim 6 , wherein the first structure includes a contact via extending through the interposer base dielectric stack, wherein the second structure includes a photonics structure through via, wherein the photonics structure through via defines a conductive path with an interposer base structure through via of the interposer base structure through vias and the contact via, the contact via having a smaller diameter than the interposer base structure through via.

9. The optoelectrical system of claim 6 , wherein the interposer base dielectric stack has integrated therein horizontal wiring, wherein the second structure includes a photonics structure through via extending through the photonics device dielectric stack that contacts the horizontal wiring of the interposer base dielectric stack, wherein a base interposer through via of the base interposer through vias, the horizontal wiring and the photonics structure through via define a conductive path for supplying an input voltage to the photonics device.

10. The optoelectrical system of claim 6 , wherein the interposer base dielectric stack has integrated therein a contact via and a horizontally extending metallization layer and, wherein an interposer base structure through via of the interposer base structure through vias, the contact via and the horizontally extending metallization layer define a conductive path for supplying an input voltage to the photonics device.

11. A method comprising:
fabricating a first wafer built structure using a first wafer, the first wafer built structure defining an interposer base structure and having a plurality of interposer base structure through vias;
fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer built structure; and
wafer scale bonding the second wafer built structure to the first wafer built structure, wherein the method includes, subsequent to the wafer scale bonding the second wafer built structure to the first wafer built structure, forming a via trench in the photonics device dielectric stack of the second wafer built structure, and filling the via trench to form a photonics structure through via, the photonics structure through via defining a conductive path with an interposer base structure through via of the interposer base structure through vias.

12. The method of claim 11 , wherein the fabricating the second wafer built structure using a second wafer includes fabricating the second wafer built structure to include a substrate side defined by a substrate of the second wafer and a dielectric side, and wherein the wafer scale bonding the second wafer built structure to the first wafer built structure includes bonding the dielectric side of the second wafer built structure to an interposer base dielectric stack of the first wafer built structure, wherein the method includes, subsequent to the wafer scale bonding, removing the substrate of the second wafer, and forming a photonics through via in the photonics device dielectric stack, the photonics through via connecting to an interposer base structure through via of the interposer base structure through vias.

13. The method of claim 11 , wherein a bond layer is formed between the first wafer built structure and the second wafer built structure as a result of the wafer scale bonding, and wherein the method includes, subsequent to the wafer scale bonding the second wafer built structure to the first wafer built structure, forming a via trench extending through the bond layer in the photonics device dielectric stack of the second wafer built structure, and filling the via trench to form a photonics structure through via.

14. The method of claim 11 , wherein the method includes, subsequent to the wafer scale bonding the second wafer built structure to the first wafer built structure, creating a photonics structure through via within the photonics device dielectric stack, the photonics structure through via having a diameter smaller than a diameter of an interposer base structure through via of the interposer base structure through vias and forming a conductive path with the interposer base structure through via, the conductive path for supplying an input voltage to the photonics device.

15. The optoelectrical system of claim 1 , wherein the conductive path comprises a second photonics structure through via extending through the photonics device dielectric stack of the second structure, and wiring connecting the photonics structure through via of the second structure and th

Assignees

• Univ New York State Res Found

Inventors

• Coolbaugh Douglas
• La Tulipe Douglas
• Leake Gerald

Classifications

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10W20/0234

  comprising etching via holes that stop on pads or on electrodes · CPC title

• H10W20/218

  in silicon-on-insulator [SOI] wafers · CPC title

• H10W20/0242

  comprising etching via holes from the back sides of the chips, wafers or substrates · CPC title