One-way broadcast communication
US-10419064-B2 · Sep 17, 2019 · US
US11435403B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11435403-B2 |
| Application number | US-201916576349-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 19, 2019 |
| Priority date | Sep 19, 2019 |
| Publication date | Sep 6, 2022 |
| Grant date | Sep 6, 2022 |
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A capacitor bank controller may obtain voltage and current measurements while the capacitor bank is disconnected from the power line. Further, the capacitor bank controller may obtain voltage and current measurements while the capacitor bank is connected to the power line. The capacitor bank controller may determine the size of the capacitor bank based on impedances from the voltage and current measurements while the capacitor bank is connected and disconnected.
Opening claim text (preview).
What is claimed is: 1. A capacitor bank controller (CBC), comprising: sensor circuitry in communication with a current sensor and a voltage sensor; memory; and a processor operatively coupled to the memory, wherein the processor is configured to: obtain a first voltage measurement and a first current measurement using the sensor circuitry while a capacitor bank is disconnected from a power system; obtain a second voltage measurement (V 1 ) and a second current measurement using the sensor circuitry while the capacitor bank is connected to the power system; calculate a disconnected impedance (Z 0 ) from the first voltage measurement and the first current measurement; calculate a connected impedance (Z 1 ) from the second voltage measurement and the second current measurement; calculate a capacitor bank impedance (Z C ) as: Z C = Z 0 Z 1 ( Z 0 - Z 1 ) calculate a size of the capacitor bank (Q) as: Q = V 1 2 Im ( Z C ) and control an operation of the capacitor bank by sending signals to a switch to electrically connect or disconnect the capacitor bank from the power system based at least in part on the size of the capacitor bank. 2. The CBC of claim 1 , wherein the processor is configured to: determine the disconnected impedance while the capacitor bank is disconnected by dividing the first voltage measurement by the first current measurement; and determine the connected impedance of the capacitor bank by dividing the second voltage measurement by the second current measurement. 3. The CBC of claim 1 , wherein the memory comprises a look-up table of standard capacitor bank sizes, wherein the processor is configured to select a standard capacitor bank size with a range in which the determined size of the capacitor bank falls within. 4. The CBC of claim 3 , wherein the processor is configured to provide a prompt indicating the selected standard capacitor bank size to allow an operator to confirm the size of the capacitor bank. 5. The CBC of claim 1 , wherein the processor is configured to determining the size of the capacitor bank based on an averaging of capacitor bank sizes from multiple sets of measurements, wherein a first set of measurements comprises the first voltage measurement, the first current measurement, the second voltage measurement, and the second current measurement. 6. The CBC of claim 1 , wherein the processor is configured to send a signal to close or open the capacitor bank immediately between the first measurements and the second measurements to capture the first measurements and the second measurements proximate in time. 7. The CBC of claim 1 , wherein the processor is configured to perform at least one of VAR control, PF control, voltage control, and current control as the control operation. 8. A tangible, non-transitory, computer-readable medium comprising instructions that, when executed by a processor, cause the processor to: receive a first voltage measurement and a first current measurement from sensor circuitry in communication with voltage and current sensors, while a capacitor bank is disconnected from a power system; receive a second voltage measurement (V 1 ) and a second current measurement from the sensor circuitry in communication with voltage and current sensors, while the capacitor bank is connected to the power system; calculate a disconnected impedance (Z 0 ) from the first voltage measurement and the first current measurement; calculate a connected impedance (Z 1 ) from the second voltage measurement and the second current measurement; calculate a capacitor bank impedance (Z C ) as: Z C = Z 0 Z 1 ( Z 0 - Z 1 ) and calculate a size of the capacitor bank (Q) as: Q = V 1 2 Im ( Z C ) and control an operation of the capacitor bank by sending signals to a switching device to electrically connect or disconnect the capacitor bank from the power system based at least in part on the size of the capacitor bank. 9. The tangible, non-transitory, computer-readable medium of claim 8 , comprising instructions that cause the processor to: receive the first voltage measurement and the first current measurement at a first time; send a signal to control a switch of the capacitor bank at a second time, immediately following the first time; and receive the second voltage measurement and the second current measurement at a third time, immediately following the second time. 10. The tangible, non-transitory, computer-readable medium of claim 8 , wherein the control operation comprises at least one of VAR control, PF control, voltage control, and current control as the control operation. 11. The tangible, non-transitory, computer-readable medium of claim 8 , comprising instructions that cause the processor to display a prompt indicating the size of the capacitor bank on a display of a capacitor bank controller. 12. A method comprising: obtaining a first voltage measurement and a first current measurement from sensor circuitry in communication with voltage and current sensors, while a capacitor bank is disconnected from a power system; obtaining a second voltage measurement (V 1 ) and a second current measurement from sensor circuitry in communication with v
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