Memory, error restoration method of the memory, and battery device comprising the memory

Patent metadata

Field	Value
Publication number	US-11429484-B2
Application number	US-202017282804-A
Country	US
Kind code	B2
Filing date	Jan 17, 2020
Priority date	Jan 17, 2019
Publication date	Aug 30, 2022
Grant date	Aug 30, 2022

Abstract

Discussed is a memory having an application area that stores at least one application; a flash bootloader (FBL) area that includes codes for updating the application area; and a BUM module that is activated after a defect is detected in the FBL area, deletes the FBL area, writes binary code information of an FBL image into the FBL area, determines whether the binary code written into the FBL area matches binary code information of the FBL image, and is deactivated when the two binary code information match. The FBL image and the BUM module may be provided in the application area.

First claim

The invention claimed is:

1. A non-transitory, tangible computer readable memory for restoring an error in a flash bootloader (FBL) area of the memory, comprising instructions stored thereon, that when executed on a processor, performs the steps of:
storing at least one application in an application area of the memory, the application area being separate from the FBL area and including a bootloader update manager (BUM) module and an FBL image;
updating, by the FBL area, the application area, the FBL area including binary code for updating the application area;
activating the BUM module after a defect is detected in the FBL area;
deleting, by the BUM module, the FBL area;
writing, by the BUM module, binary code information of the FBL image into the FBL area;
determining, by the BUM module, whether the binary code written into the FBL area matches binary code information of the FBL image; and
deactivating the BUM module, when the binary code of the FBL area matches the binary code information of the FBL image.

2. The memory of claim 1 , wherein the memory further performs the step of carrying out a defect check of the flash bootloader code, by the FBL area, by being synchronized with a wake-up of a device including the memory.

3. The memory of claim 1 , wherein the memory further performs the step of calculating, by the BUM module, a checksum of the binary code written into the FBL area, and deactivating the BUM module when the calculated value matches a reference checksum, the reference checksum being is a checksum calculation value with respect to the binary code of the FBL image.

4. The memory of claim 1 , wherein the memory further performs the steps of:
calculating, by the BUM module, a checksum of the binary code written into the FBL area, and
when it is determined that the calculation value and a reference checksum do not match:
deleting, by the BUM module, the FBL area,
writing, by the BUM module, binary code information of the FBL image to the FBL area,
calculating, by the BUM module, a checksum of the binary code written into the FBL area, and

determining, by the BUM module, whether the calculation value matches a reference checksum, the reference checksum being the calculated checksum value with respect to the binary code of the FBL image.

5. An error restoring method of a memory that includes an application area and a flash bootloader (FBL) area, the FBL area including binary codes for updating the application area and the application area being separate from the FBL area and including a bootloader update manager (BUM) module and an FBL image, the error restoring method comprising:
performing, by the FBL area, a defect check of a flash bootloader code by synchronizing with a wake-up of a device including the memory;
activating the BUM module when a defect is detected in the FBL area as a result of the defect check;
deleting the FBL area, by the BUM module;
writing binary code information of the FBL image into the FBL area, by the BUM module;
determining whether the binary codes written into the FBL area match the binary code information of the FBL image, by the BUM module; and
activating or deactivating the BUM module according to a result of the determination.

6. The error restoring method of the memory of claim 5 , wherein the performing the defect check of the flash bootloader code of the FBL area comprises using a checksum of the flash bootloader code.

7. The error restoring method of the memory of claim 5 , wherein the determining whether the binary codes written into the FBL area match the binary code information of the FBL image, by the BUM module, comprises:
calculating a checksum of the binary code written into the FBL area, by the BUM module; and
comparing the calculated checksum value with a reference checksum,
wherein the reference checksum is a checksum calculation value with respect to the binary code of the FBL image.

8. The error restoring method of the memory of claim 7 , further comprising deactivating the BUM module when the calculated checksum value matches the reference checksum.

9. The error restoring method of the memory of claim 7 , wherein, when the calculated value does not match the reference checksum, the BUM module repeats the deleting of the FBL area, the writing of the binary code information of the FBL image into the FBL area, and the determining whether the binary codes written into the FBL area matches the binary code information of the FBL image.

10. A battery device comprising:
a battery cell assembly that includes a plurality of battery cells; and
a battery management system that manages the battery cell assembly,
wherein the battery management system comprises a memory that includes various applications configured to collect and process state information with respect to the battery cell assembly and managing the battery cell assembly,
wherein the memory comprises:
an application area configured to store at least one application; and
a flash bootloader (FBL) area that includes binary codes configured to update the application area, the application area being separate from the FBL area and including a bootloader update manager (BUM) module and an FBL image; and
wherein the BUM module is configured to:
activate after a defect is detected in the FBL area,
delete the FBL area,
write binary code information of the FBL image into the FBL area,
determine whether the binary code written into the FBL area matches binary code information of the FBL image, and
deactivate when the binary code of the FBL area matches the binary code information of the FBL image.

11. The battery device of claim 10 , wherein the FBL area carries out a defect check of a flash bootloader code by being synchronized with a wake-up of a device including the memory.

12. The battery device of claim 10 , wherein the BUM module is configured to:
calculate a checksum of the binary code written into the FBL area, and
deactivate when the calculated value matches a reference checksum, the reference checksum being a checksum calculation value with respect to the binary code of the FBL image.

13. The battery device of claim 10 , wherein the BUM module is configured to:
calculate a checksum of the binary code written into the FBL area, and
when it is determined that the calculation value and a reference checksum do not match:
delete the FBL area,
write binary code information of the FBL image to the FBL area,
calculate a checksum of the binary code written into the FBL area, and
determine whether the calculation value matches the reference checksum, the reference checksum being a calculated checksum value with respect to the binary code of the FBL image.

Assignees

• Lg Chemical Ltd
• Lg Energy Solution Ltd

Inventors

• Ryu Jesung

Classifications

• H01M10/425

  Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing (printed circuits H05K1/00) · CPC title

• H01M2010/4271

  Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing · CPC title

• Y02E60/10

  Energy storage using batteries · CPC title

• G06F11/1004 Primary

  to protect a block of data words, e.g. CRC or checksum (G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00) · CPC title

• G06F11/1417

  Boot up procedures · CPC title