Task scheduling based on performance control conditions for multiple processing units

Patent metadata

Field	Value
Publication number	US-11429439-B2
Application number	US-202016947434-A
Country	US
Kind code	B2
Filing date	Jul 31, 2020
Priority date	Jan 29, 2014
Publication date	Aug 30, 2022
Grant date	Aug 30, 2022

Abstract

Provided is a task scheduling method. The method may include: assigning a task to one of first processing units functionally connected to an electronic device; and migrating, at least partially on the basis of a performance control condition related to the task, the task to one of second processing units for processing.

First claim

What is claimed is:

1. A method for scheduling tasks using a heterogeneous multiple processor cores including first processor cores and second processor cores in an electronic device, the method comprising:
generating a plurality of tasks based on executing an application;
classifying the plurality of tasks based on a workload of each task into high-workload tasks or low-workload tasks, wherein the high-workload tasks are assigned to the first processor cores and the low-workload tasks are assigned to the second processor cores, and wherein the workload of the high-workload tasks is above a threshold value, and the workload of the low-workload tasks is below or equal to the threshold value;
detecting a touch input related to the application, while processing the high-workload tasks in the first processor cores and the low-workload tasks in the second processor cores;
in response to the touch input, migrating a portion of the low-workload tasks from the second processor cores to the first processor cores;
processing the migrated portion of the low-workload tasks and the high-workload tasks in the first processor cores; and
after no touch input is detected for a preset time, migrating the portion of the low-workload tasks that migrated to the first processor cores to the second processor cores,
wherein the first processor cores comprise higher performance processors than the second processor cores.

2. The method of claim 1 , wherein each of the first processor cores is a minimum entity with a processing capability for executing instructions of the high-workload tasks.

3. The method of claim 1 , wherein the second processor cores are low-power processor cores.

4. The method of claim 1 , wherein the migrating of the portion of the low-workload tasks that migrated to the first processor cores to the second processor cores is based on satisfaction of a preset condition, wherein the preset condition comprises a completion event of a website loading.

5. An electronic device comprising:
a heterogeneous multi-core processor including first processor cores and second processor cores, wherein the heterogeneous multi-core processor is configured to:
generate a plurality of tasks based on executing an application,
classify the plurality of tasks based on a workload of each task, into high-workload tasks or low-workload tasks, wherein the high-workload tasks are assigned to the first processor cores and the low-workload tasks are assigned to the second processor cores, and wherein the workload of the high-workload tasks is above a threshold value, and the workload of the low-workload tasks is below or equal to the threshold value,
detect a touch input related to the application, while processing the high-workload tasks in the first processor cores and the low-workload tasks in the second processor cores,
in response to the touch input, migrate a portion of the low-workload tasks from the second processor cores to the first processor cores,
process the migrated portion of the low-workload tasks and the high-workload tasks in the first processor cores, and
after no touch input is detected for a preset time, migrate the portion of the low-workload tasks that were migrated to the first processor cores to any one of the second processor cores,
wherein the first processor cores comprise higher performance processors than the second processor cores.

6. The electronic device of claim 5 , wherein the first processor cores and the second processor cores constitute one or more independent processors.

7. The electronic device of claim 5 , wherein the migration of the portion of the low-workload tasks that migrated to the first processor cores to the second processor cores is based on satisfaction of a preset condition, wherein the preset condition comprises a completion event of a website loading.

8. The electronic device of claim 5 , wherein each of the first processor cores is a minimum entity with a processing capability for executing instructions of the high-workload tasks.

9. The electronic device of claim 5 , wherein the second processor cores are low-power processor cores.

10. A non-transitory storage medium storing instructions causing an electronic device to execute a task scheduling method, wherein the instructions, when executed by the electronic device, are configured to cause the electronic device to:
generate a plurality of tasks based on executing an application;
classify the plurality of tasks based on a workload of each task, into high-workload tasks or low-workload tasks, wherein the high-workload tasks are assigned to first processor cores and the low-workload tasks are assigned to second processor cores, and wherein the workload of the high-workload tasks is above a threshold value, and workload of the low-workload tasks is below or equal to the threshold value;
detect a touch input related to the application, while processing the high-workload tasks in the first processor cores and the low-workload tasks in the second processor cores;
in response to the touch input, migrate a portion of the low-workload tasks from the second processor cores to the first processor cores;
process the migrated portion of the low-workload tasks and the high-workload tasks in the first processor cores; and
after no touch input is detected for a preset time, migrate the portion of the low-workload tasks that were migrated to the first processor cores to any one of the second processor cores,
wherein the first processor cores comprise higher performance processors than the second processor cores.

11. The non-transitory storage medium of claim 10 , wherein each of the first processor cores is a minimum entity with a processing capability for executing instructions of the high-workload tasks.

12. The non-transitory storage medium of claim 10 , wherein the low performance second processor cores are low-power processor cores.

13. The non-transitory storage medium of claim 10 , wherein the migration of the portion of the low-workload tasks that migrated to the first processor cores to the second processor cores is based on satisfaction of a preset condition, wherein the preset condition comprises a completion event of a website loading.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Dohyoung
• Kim Joohwan
• Park Hyunjin
• Youn Changhwan
• Han Donghee

Classifications

• G06F9/4881

  Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues · CPC title

• G06F9/5094

  where the allocation takes into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206) · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F9/4893 Primary

  taking into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206) · CPC title

• G06F9/5088 Primary

  involving task migration · CPC title