Apparatus and method for proactive power management to avoid unintentional processor shutdown

Patent metadata

Field	Value
Publication number	US-11429173-B2
Application number	US-201816230440-A
Country	US
Kind code	B2
Filing date	Dec 21, 2018
Priority date	Dec 21, 2018
Publication date	Aug 30, 2022
Grant date	Aug 30, 2022

Abstract

Described is an apparatus and method to prevent a processor from abruptly shutting down by proactive power management. The apparatus comprises a power supply rail to receive a current and a voltage from a power supply generator (e.g., a DC-DC converter, and low dropout regulator); a processor coupled to the power supply rail, wherein the processor is to operate with a current and a voltage provided by the power supply rail; and an interface to receive a request to throttle one or more performance parameters of the processor when a monitored current through the power supply rail or a monitored voltage on the power supply rail crosses a threshold current or a threshold voltage, respectively, wherein the threshold current is below a catastrophic threshold current of a voltage regulator, or wherein the threshold voltage is above a catastrophic threshold voltage of the processor.

First claim

We claim:

1. An apparatus comprising:
a power supply generator to provide current and voltage to a power supply rail;
a processor core coupled to the power supply rail, the processor core to operate with the current and voltage provided by the power supply generator;
circuitry to monitor the current provided by the power supply generator and to provide an override signal when the current exceeds a current threshold;
circuitry to monitor the voltage provided by the power supply generator and to provide a clamp signal when the voltage drops below a voltage threshold;
circuitry to receive the override signal and the clamp signal, send a throttle signal to the processor core when the override signal indicates the current exceeds the current threshold, and send the throttle signal to the processor core when the clamp signal indicates the voltage drops below the voltage threshold; and
circuitry to at least partially turn off the power supply generator, in response to the override signal, when the monitored current exceeds the current threshold, wherein:
the power supply generator comprises a high-side switch coupled in series with a low-side switch, and an inductor coupled at one side to a point between the high-side switch of the power supply generator and the low-side switch and at another side to the power supply rail;
the circuitry to monitor the current is coupled across the inductor and comprises an amplifier, a replica high-side switch and a summation node;
the amplifier comprises two inputs to detect a voltage difference across the inductor and output an average current of the inductor;
the replica high-side switch is to mimic a ripple current of the inductor; and
the summation node is to sum the average current and the ripple current to sense the current provided by the power supply generator.

2. The apparatus of claim 1 , wherein the throttle signal is a request to reduce an operating frequency of the processor core.

3. The apparatus of claim 1 , wherein the throttle signal is a request to modify a divider ratio of a phase-locked loop (PLL) of the processor core.

4. The apparatus of claim 1 , further comprising a clamp circuit, the clamp circuit comprising a diode, the clamp circuit to clamp the voltage on the power supply rail to a predetermined voltage level determined by a voltage drop of the diode when the clamp signal indicates the monitored voltage crossed below the voltage threshold.

5. The apparatus of claim 4 , wherein the predetermined voltage level is below the voltage threshold.

6. The apparatus of claim 1 , wherein the high-side switch of the power supply generator is turned off to at least partially turn off the power supply generator when the monitored current crosses the current threshold.

7. The apparatus of claim 6 , wherein the circuitry to at least partially turn off the power supply generator is to turn off the high-side switch of the power supply generator for a duration of an expected voltage droop on the power supply rail.

8. The apparatus of claim 1 , wherein the power supply generator comprises one of: a DC-DC converter, a buck converter, a boost converter, a low dropout (LDO) regulator, a switched capacitor voltage regulator, or a bi-directional DC-DC converter.

9. The apparatus of claim 1 , wherein:
the circuitry to receive the override signal and the clamp signal, and to send the throttle signal to the processor core, comprises an OR logic gate;
the override signal and the clamp signal are inputs to the OR gate; and
the throttle signal is an output of the OR gate.

10. The apparatus of claim 4 , wherein:
the power supply generator is at least partially turned off from a start to an end of a first time period; and
the clamp circuit is to clamp the voltage on the power supply rail to the predetermined voltage level from a start to an end of a second time period which is different than the first time period.

11. The apparatus of claim 10 , wherein:
the start of the second time period is before the start of the first time period; and
the end of the second time period is after the end of the first time period.

12. The apparatus of claim 1 , wherein the replica high-side switch comprises a current source in series with a switch.

13. A system comprising:
a power supply generator to provide a current and a voltage to a power supply rail, wherein the power supply generator comprises a high-side switch coupled in series with a low-side switch, a processor is coupled to the power supply rail, and the processor is to operate with the current and the voltage provided by the power supply rail;
a clamp circuit coupled to the power supply rail;
circuitry to monitor the current, the circuitry to monitor the current is to provide an override signal to the power supply generator in a first time period in which the current exceeds a current threshold;
circuitry to monitor the voltage, the circuitry to monitor the voltage is to provide a clamp signal to the clamp circuit in a second time period in which the voltage drops below a voltage threshold;
wherein the first time period starts after a start of the second time period and ends before an end of the second time period; and
circuitry to send a request to the processor to throttle one or more performance parameters of the processor when the current exceeds the current threshold and to throttle the one or more performance parameters of the processor when the voltage drops below the voltage threshold, wherein:
when the voltage drops below the voltage threshold, the circuitry to monitor the voltage is to provide the clamp signal to the clamp circuit to clamp the voltage on the power supply rail to a predetermined voltage level from the start of the second time period until the end of the second time period;
after the start of the second time period, the current increases toward, and then exceeds, the current threshold; and
when the current exceeds the current threshold, the circuitry to monitor the current is to provide an override signal to the high-side switch to turn off the high-side switch from the start of the first time period to the end of the first time period.

14. The system of claim 13 , wherein the clamp circuit comprises a diode, and the predetermined voltage level is determined by a voltage drop of the diode when the voltage drops below the voltage threshold.

15. The system of claim 13 , wherein the predetermined voltage level is below the voltage threshold.

16. The system of claim 13 , wherein:
the voltage threshold to cause the clamp circuit to clamp the voltage on the power supply rail to the predetermined voltage level is a droop detect level; and
a voltage threshold to turn off the clamp circuit is higher than the droop detect level.

Assignees

• Intel Corp

Inventors

• Nge Chee Lim
• Jain Amit
• Deval Anant
• Angel Nimrod
• Paillet Fabrice
• Zelikson Michael
• Rodriguez Sergio Carlo

Classifications

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M3/1566

  with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation · CPC title

• G06F1/305

  in the event of power-supply fluctuations · CPC title

• G06F1/3206 Primary

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

• G06F1/28 Primary

  Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title