Multi-deck circuits with common rails

Patent metadata

Field	Value
Publication number	US-11429129-B2
Application number	US-202015930817-A
Country	US
Kind code	B2
Filing date	May 13, 2020
Priority date	May 13, 2020
Publication date	Aug 30, 2022
Grant date	Aug 30, 2022

Abstract

A multi-deck circuit arrangement including a first deck circuit having a negative supply terminal and a second deck having a positive supply terminal connected to the negative supply terminal. A single power supply provides a voltage across both the first and second decks. The total power consumption will be less than the prior art of having both deck circuits conventionally regulated. The supply rail connecting the second deck's positive supply terminal to the first deck's negative supply terminal may be regulated. In one embodiment, the rail voltage can be controlled to optimize deck circuit operation for speed and power and to avoid level shifters when interfacing to other circuits.

First claim

What is claimed is:

1. Circuitry comprising:
a first circuit comprising a first positive supply terminal and a first negative supply terminal;
a second circuit comprising a second voltage positive supply terminal and a second negative supply terminal, where the first negative supply terminal is electrically connected to the second positive supply terminal;
a voltage source comprising a first terminal and a second terminal, the first terminal being connected electrically with the first positive supply terminal and the second terminal being connected electrically with the second negative supply terminal, the voltage source being configured to provide a voltage across the first terminal and the second terminal; and
dump circuitry including a true random number generator, the dump circuitry configured to regulate a voltage across one or more of the first circuit and the second circuit.

2. The circuitry of claim 1 , further comprising a voltage regulator configured to control an intermediate voltage between the first circuit and the second circuit, the intermediate voltage being connected electrically to the first negative supply terminal and to the second positive supply terminal.

3. The circuitry of claim 2 , wherein the voltage regulator is configured to control the intermediate voltage by controlling currents flowing into the first and second circuits.

4. The circuitry of claim 2 , wherein the voltage regulator is configured to control the intermediate voltage by gating one or more transistors to affect the currents flowing into the first and second circuits.

5. The circuitry of claim 2 , wherein the voltage regulator is configured to control the intermediate voltage by controlling current dump circuits to affect the currents flowing into the first and second circuits.

6. The circuitry of claim 1 , further comprising a third circuit comprising a third positive supply terminal and a third negative supply terminal, where the second negative supply terminal is connected to the third positive supply terminal, and where the second terminal is connected in series with the third negative supply terminal.

7. The circuitry of claim 1 , wherein at least one of the first circuit or the second circuit comprises complementary metal oxide semiconductor (CMOS) circuitry, that is any CMOS circuit having one or more body terminals connected either to a voltage that exceeds the voltage of the positive supply terminal of the circuit or less than the voltage of the negative supply terminal of the circuit.

8. Circuitry comprising:
a first circuit comprising a first positive supply terminal and a first negative supply terminal, the first circuit being configured to operate using a first voltage;
a second circuit comprising a second positive supply terminal and a second negative supply terminal, where the first negative supply terminal is connected to the second positive supply terminal and the second circuit is configured to operate using a second voltage;
a voltage regulator configured to regulate the first voltage and the second voltage by balancing current between the first circuit and second circuit;
a voltage source comprising a first terminal and a second terminal, the first terminal being connected electrically with the first positive supply terminal and the second terminal being connected electrically with the second negative supply terminal, the voltage source being configured to provide a voltage across the first terminal and the second terminal; and
dump circuitry including a true random number generator, the dump circuitry configured to regulate a voltage across one or more of the first circuit and the second circuit.

9. The circuitry of claim 8 , further comprising a third circuit comprising a third positive supply terminal and a third negative supply terminal, where the second negative supply terminal is connected to the third positive supply terminal, and where the second terminal is connected with the third negative supply terminal.

10. The circuitry of claim 8 , wherein the voltage regulator is configured to implement adaptive voltage scaling (AVS) to regulate the first voltage and the second voltage, wherein AVS comprises a closed-loop dynamic power minimization process that adjusts at least one of the first voltage or the second voltage to match minimum required circuit power consumption.

Assignees

• Sensata Technologies Inc

Inventors

• Howard Neil J
• Bianchi Davide

Classifications

• H03K19/0013

  in field effect transistor circuits · CPC title

• G05F1/46

  wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) · CPC title

• G05F1/575

  characterised by the feedback circuit · CPC title

• G05F1/462

  as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic · CPC title

• G05F1/465

  Internal voltage generators for integrated circuits, e.g. step down generators · CPC title