Sensitivity correction method and photon counting detector
US-2020064498-A1 · Feb 27, 2020 · US
US11428825B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11428825-B2 |
| Application number | US-201916721457-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 19, 2019 |
| Priority date | Dec 19, 2019 |
| Publication date | Aug 30, 2022 |
| Grant date | Aug 30, 2022 |
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Various methods and systems are provided for an imaging detector array. In one example, a detector module of the array has a central slit separating a first tile from a second tile of the detector module. An integrated circuit is located along a first side of the first tile and along a first side of the second tile and flex cable coupled to the integrated circuit of the first portion extends through the central slit of the detector module.
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The invention claimed is: 1. An imaging system, comprising; at least one detector module, the at least one detector module having a central slit separating a first tile from a second tile of the at least one detector module; a first integrated circuit located along a first side of the first tile, the first side of the first tile facing the central slit and proximate to the second tile, and a second integrated circuit located along a first side of the second tile, the first side of the second portion an outward-facing surface of the at least one module and distal to the first portion; and a first cable coupled to the first integrated circuit of the first tile and extending through the central slit of the at least one detector module. 2. The imaging system of claim 1 , further comprising additional detector modules arranged adjacent to the at least one detector module, each additional detector module having an identical configuration as the at least one detector module and wherein the first and second integrated circuits coupled to the at least one detector module and the additional detector modules are uniformly spaced apart. 3. The imaging system of claim 1 , wherein the first integrated circuit of the first tile is electrically coupled to a first photodiode positioned directly above the first tile and the first integrated circuit of the second tile is electrically coupled to a second photodiode of positioned directly above the second tile, and wherein the first integrated circuit of the first tile is positioned in the central slit. 4. The imaging system of claim 3 , wherein the central slit extends between a first conductive block of the first tile and a second conductive block of the second tile, the first conductive block and the second conductive block arranged directly under the first and second photodiodes, respectively, and further extends through a base block positioned directly under the first and second conductive blocks and wherein the first integrated circuit located along the first side of the first tile is positioned within the central slit. 5. The imaging system of claim 4 , wherein the second integrated circuit located along the first side of the second tile extends along a recess in a side surface of the second conductive block and wherein the first and second integrated circuits do not protrude, with respect to a vertical axis of the detector module, beyond outer edges of the first and second photodiodes, respectively, along a plane perpendicular to the vertical axis. 6. The imaging system of claim 1 , wherein the first cable extending through the central slit is coupled at one end to a circuit board positioned below the base block and wherein the first cable extends between the first integrated circuit of the first tile and the circuit board. 7. The imaging system of claim 6 , further comprising a second cable extending between the second integrated circuit of the second tile and the circuit board and wherein the first cable and second cable couple to opposite sides of the circuit board. 8. The imaging system of claim 1 , wherein the first integrated circuit of the first tile and the second integrated circuit of the second tile are located only along the first side of the first portion and the first side of the second portion and not along a second side, opposite of the first side, of the first and second tiles of the detector module. 9. A detector module, comprising; a first direct conversion detector positioned at an upper region of a first tile; a second direct conversion detector positioned at an upper region of a second tile, the second tile adjacent to the first tile and separated from the first tile by a slit extending through a central region of the detector module between the first and second tiles; a first integrated circuit electrically coupled to the first direct conversion detector, the first integrated circuit positioned in the slit and attached to a first cable extending through the slit; a second integrated circuit electrically coupled to the second direct conversion detector, the second integrated circuit positioned along an outer surface of the second tile and attached to a second cable; and a circuit board arranged below the first and second tiles, wherein the first and second cables are connected to the circuit board. 10. The detector module of claim 9 , wherein the second integrated circuit and the second cable extend along an outward-facing side of the second tile distal to the first tile and the first integrated circuit and first cable extend along a slit-facing side of the first tile proximate to the second tile and wherein the first integrated circuit is spaced away from the second integrated circuit by at least a width of the second tile. 11. The detector module of claim 9 , wherein the first cable extends along the slit-facing side of the first tile between the first integrated circuit and the circuit board and the second cable extends along the outward-facing side of the second tile between the second integrated circuit and the circuit board and wherein the first and second cables are flex cables. 12. The detector module of claim 9 , wherein the first and second cables couple to opposite sides of the circuit board. 13. The detector module of claim 9 , wherein the circuit board is substantially parallel with a centerline of the detector module and wherein the first cable and second cables are coupled to a same side of the circuit board. 14. The detector module of claim 9 , further comprising a lower portion of the detector module positioned below the first and second tiles and wherein the lower portion includes a removable cover configured to be a heat sink to absorb heat generated by the first and second integrated circuits. 15. The detector module of claim 14 , wherein removal of the removable cover enables access to a side of the circuit board to which the first cable is coupled. 16. The detector module of claim 9 , wherein the detector module is formed of two pieces configured to be detachable. 17. The detector module of claim 9 , further comprising a thermal bridge continuous with a base block of the detector module, the thermal bridge configured to transfer heat across the slit. 18. A detector array, comprising; a plurality of detector modules, each detector module configured with a central slit dividing a first set of one or more tiles from a second tile set of one or more tiles of the detector module; integrated circuits coupled to each of the first set of one or more tiles and each of the second set of one or more tiles, the integrated circuits evenly distributed through the detector array; and cables coupled to the integrated circuits, wherein a portion of the cables are configured to extend through the central slit of the plurality of detector modules, between the first portion and the second portion. 19. The detector array of claim 18 , wherein half of the integrated circuits of the detector array are positioned within the central slit. 20. The detector array of claim 18 , wherein the portion of the cables extending through the central slit of the plurality of detector modules extend through the central slit to couple to circuit boards at a first side of the circuit boards and a portion of the cables not extending through the central slit extend along an outer surface of the plurality of detector modules to couple to the circuit boards at a second, opposite side of the circuit boards.
Cooling of mounted components (H05K1/0272 takes precedence) · CPC title
Cables · CPC title
using tomography, e.g. computed tomography [CT] · CPC title
Means for cooling (A61B6/045 takes precedence) · CPC title
Auxiliary details, e.g. casings, cooling, damping or insulation against damage by, e.g. heat, pressure or the like · CPC title
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