Duty cycle correction system and low dropout (ldo) regulator based delay-locked loop (dll)
US-2020106430-A1 · Apr 2, 2020 · US
US11424840B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11424840-B2 |
| Application number | US-202117392334-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 3, 2021 |
| Priority date | Aug 10, 2020 |
| Publication date | Aug 23, 2022 |
| Grant date | Aug 23, 2022 |
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A measurement apparatus comprising a first terminal to receive an input signal of a circuit under test; a second terminal to receive an output signal of the circuit under test. A first and second phase splitter configured to generate a first and second phase signal, I1 and I2, and a first and second quadrature signal, Q1 and Q2. A first and second multiplexer, each coupled to the first terminal and the second terminal and configured to alternately pass the input and output signals of the circuit under test to the inputs of the first and second phase splitters. A double-quadrature mixer having four inputs configured to receive I1, Q1, I2, and Q2, and an output. A calculation unit to determine one or both of a phase shift of the circuit under test and/or a gain of the circuit under test based on the output of the double-quadrature mixer.
Opening claim text (preview).
The invention claimed is: 1. A measurement apparatus comprising: a first terminal for coupling to a circuit under test to receive a first signal representative of an input signal to said circuit under test; a second terminal for coupling to the circuit under test to receive a second signal representative of output from said circuit under test; a first phase splitter configured to generate, based on a signal provided at an input of said first phase splitter, a first phase signal, I 1 , and a first quadrature signal, Q 1 , said first quadrature signal in quadrature with said first phase signal; a second phase splitter configured to generate, based on a signal provided at an input of said second phase splitter, a second phase signal, I 2 , and a second quadrature signal, Q 2 , said second quadrature signal in quadrature with said second phase signal; a first multiplexer coupled to the first terminal and the second terminal and configured, in a first mode of the first multiplexer, to pass the first signal to the input of the first phase splitter and, in a second mode of the first multiplexer, to pass the second signal to the input of the first phase splitter; a second multiplexer coupled to the first terminal and the second terminal and configured, in a first mode of the second multiplexer, to pass the second signal to the input of the second phase splitter and, in a second mode of the second multiplexer, to pass the first signal to the input of the second phase splitter; a double-quadrature mixer having four inputs configured to receive the first phase signal, I 1 , the first quadrature signal, Q 1 , the second phase signal, I 2 , and the second quadrature signal, Q 2 , and an output; and a calculation unit configured to receive the output of the double-quadrature mixer, the output comprising a pair of signals, and determine one or both of: a) a phase shift of the circuit under test based on the pair of signals at said output of the double-quadrature mixer, with said first multiplexer in the first mode and the second multiplexer in the first mode, and the pair of signals at said output with said first multiplexer in the second mode and the second multiplexer in the second mode; b) a gain of the circuit under test, comprising a ratio of an amplitude, B, of the second signal and an amplitude, A, of the first signal, based on the output of the double-quadrature mixer, with said first multiplexer in the first mode and the second multiplexer in the second mode, and the output of the double-quadrature mixer, with said first multiplexer in the second mode and the second multiplexer in the first mode. 2. The measurement apparatus of claim 1 wherein, to determine the phase shift of the circuit under test, the calculation unit is configured to determine, based on the pair of signals at said output with said first multiplexer in the first mode and the second multiplexer in the first mode, the following: a first average value, M 1 , of I 1 ·I 2 +Q 1 ·Q 2 ; and a second average value, M 2 , of I 1 ·Q 2 −I 2 ·Q 1 ; and the calculation unit is configured to determine, based on the pair of signals at said output with said first multiplexer in the second mode and the second multiplexer in the second mode, the following: a third average value, M 3 , of I 1 ·I 2 +Q 1 ·Q 2 ; a fourth average value, M 4 , of I 1 ·Q 2 −I 2 ·Q 1 ; wherein the phase shift of the circuit under test is given by: 1 2 { a tan ( M 2 M 1 ) - a tan ( M 4 M 3 ) } . 3. The measurement apparatus of claim 2 wherein, to determine the phase shift of the circuit under test, the calculation unit is configured to determine the following: a reference average value, M 0 , based on the output of the double quadrature mixer, in which the measurement apparatus is configured such that one of: the inputs to the double-quadrature mixer are disconnected from the first and second phase splitter or the first signal and the second signal are set to zero; and wherein the phase shift of the circuit under test comprises: 1 2 { a tan ( M 2 - M 0 M 1 - M
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