Heterogeneous bus bridge circuit and related apparatus

Patent metadata

Field	Value
Publication number	US-11424779-B2
Application number	US-201916414007-A
Country	US
Kind code	B2
Filing date	May 16, 2019
Priority date	Nov 8, 2018
Publication date	Aug 23, 2022
Grant date	Aug 23, 2022

Abstract

A heterogeneous bus bridge circuit and related apparatus are provided. The heterogeneous bus bridge circuit is configured to bridge a radio frequency front-end (RFFE) bus with a number of auxiliary buses that are different from the RFFE bus. Each of the auxiliary buses may support a fixed number of slaves identified respectively by a unique slave identification (USID). In examples discussed herein, the heterogeneous bus bridge circuit can be configured to selectively activate an auxiliary bus for communication with the RFFE bus, thus making it possible to reuse a same set of USIDs among the auxiliary buses without causing potential identification conflict. As such, it may be possible to support more slaves in an apparatus with a single RFFE bus. As a result, it may be possible to reduce pin count requirement for an RFFE master and/or enable flexible heterogeneous bus deployment in the apparatus.

First claim

What is claimed is:

1. A heterogeneous bus bridge circuit comprising:
a primary port coupled to a radio frequency front-end (RFFE) master via an RFFE bus;
at least one first auxiliary port coupled to at least one first slave via at least one first auxiliary bus;
at least one second auxiliary port coupled to at least one second slave via at least one second auxiliary bus; and
a bridge controller configured to:
receive a predefined RFFE command sequence comprising a unique slave identification (USID) identifying the heterogeneous bus bridge circuit and an indication that is different from the USID and uniquely identifies at least one selected auxiliary bus among the at least one first auxiliary bus and the at least one second auxiliary bus for communication with the RFFE master; and
activate at least one selected auxiliary port coupled to the at least one selected auxiliary bus among the at least one first auxiliary port and the at least one second auxiliary port in response to receiving the predefined RFFE command sequence.

2. The heterogeneous bus bridge circuit of claim 1 , wherein the USID identifying the heterogeneous bus bridge circuit is a specially assigned USID between hexadecimal value one (0x1) and hexadecimal value fifteen (0xF), wherein the bridge controller is further configured to activate the at least one selected auxiliary port in response to receiving the predefined RFFE command sequence comprising the specially assigned USID.

3. The heterogeneous bus bridge circuit of claim 2 wherein each of the at least one first auxiliary bus and the at least one second auxiliary bus is configured to support a plurality of USIDs between hexadecimal value one (0x1) and hexadecimal value fifteen (0xF) excluding the specially assigned USID.

4. The heterogeneous bus bridge circuit of claim 1 wherein:
the RFFE bus is configured to communicate RFFE command sequences and data payloads at a first data rate; and
each of the at least one first auxiliary bus and the at least one second auxiliary bus comprises a single-wire bus (SuBUS) configured to communicate SuBUS command sequences and data payloads at a second data rate different from the first data rate.

5. The heterogeneous bus bridge circuit of claim 4 wherein the bridge controller is further configured to:
receive an RFFE register-write command sequence via the primary port;
convert the RFFE register-write command sequence to a SuBUS register-write command sequence; and
provide the SuBUS register-write command sequence to the at least one selected auxiliary port.

6. The heterogeneous bus bridge circuit of claim 4 wherein the bridge controller is further configured to:
receive an RFFE register-poll command sequence via the primary port;
convert the RFFE register-poll command sequence into a SuBUS register-poll command sequence;
provide the SuBUS register-poll command sequence to the at least one selected auxiliary port;
receive at least one SuBUS data payload via the at least one selected auxiliary port; and
store the at least one SuBUS data payload received via the at least one selected auxiliary port.

7. The heterogeneous bus bridge circuit of claim 6 wherein the bridge controller is further configured to:
receive an RFFE register-read command sequence corresponding to the heterogeneous bus bridge circuit;
generate at least one RFFE data payload based on the at least one stored SuBUS data payload; and
provide the at least one RFFE data payload to the primary port.

8. The heterogeneous bus bridge circuit of claim 7 wherein the bridge controller is further configured to store the at least one SuBUS data payload prior to generating the at least one RFFE data payload to compensate for a difference between the first data rate and the second data rate.

9. An apparatus comprising:
a radio frequency front-end (RFFE) bus and an RFFE master coupled to the RFFE bus;
at least one first auxiliary bus and a plurality of first slaves coupled to the at least one first auxiliary bus;
at least one second auxiliary bus and a plurality of second slaves coupled to the at least one second auxiliary bus; and
a heterogeneous bus bridge circuit comprising:
a primary port coupled to the RFFE master via the RFFE bus;
at least one first auxiliary port coupled to the plurality of first slaves via the at least one first auxiliary bus;
at least one second auxiliary port coupled to the plurality of second slaves via the at least one second auxiliary bus; and
a bridge controller configured to:
receive a predefined RFFE command sequence comprising a unique slave identification (USID) identifying the heterogeneous bus bridge circuit and comprising an indication that is different from the USID and uniquely identifies at least one selected auxiliary bus among the at least one first auxiliary bus and the at least one second auxiliary bus for communication with the RFFE master; and
activate at least one selected auxiliary port coupled to the at least one selected auxiliary bus among the at least one first auxiliary port and the at least one second auxiliary port in response to receiving the predefined RFFE command sequence.

10. The apparatus of claim 9 wherein:
the USID identifying the heterogeneous bus bridge circuit is a specially assigned USID between hexadecimal value one (0x1) and hexadecimal value fifteen (0xF); and
the bridge controller is further configured to activate the at least one selected auxiliary port in response to receiving the predefined RFFE command sequence comprising the specially assigned USID.

11. The apparatus of claim 10 wherein each of the at least one first auxiliary bus and the at least one second auxiliary bus is configured to support a plurality of USIDs between hexadecimal value one (0x1) and hexadecimal value fifteen (0xF) excluding the specially assigned USID.

12. The apparatus of claim 9 wherein:
the RFFE bus is configured to communicate RFFE command sequences and data payloads at a first data rate; and
each of the at least one first auxiliary bus and the at least one second auxiliary bus comprises a single-wire bus (SuBUS) configured to communicate SuBUS command sequences and data payloads at a second data rate different from the first data rate.

13. The apparatus of claim 12 wherein the bridge controller is further configured to:
receive a first predefined RFFE command sequence corresponding to the heterogeneous bus bridge circuit and configured to identify the at least one first auxiliary bus for communication with the RFFE master;
activate the at least one first auxiliary port and deactivate the at least one second auxiliary port;
receive at least one first RFFE register-write command sequence corresponding to a selected first slave among the plurality of first slaves;
convert the at least one first RFFE register-write command sequence into at least one first SuBUS register-write command sequence corresponding to the selected first slave; and
provide the at least one first SuBUS register-write command sequence to the at least one first auxiliary port.

14. The apparatus of claim 13 wherein the bridge controller is further configured to:
receive a second predefined RFFE command sequence corresponding to the heterogeneous bus bridge circuit and configured to identify the at least one second auxiliary bus for communication with the RFFE master;
activate the at least one second auxiliary port and deactivate the at least one first auxiliary port;
receive at least one second RFFE register-write command sequence via the primary port corresponding to a selected second slave among the plurality of second slaves;
convert the

Assignees

• Qorvo Us Inc

Inventors

• Ngo Christopher Truong
• Hietala Alexander Wayne

Classifications

• H04B1/3805 Primary

  with built-in auxiliary receivers · CPC title

• G06F13/20

  for access to input/output bus · CPC title

• H04B1/40

  Circuits · CPC title

• H04B1/16

  Circuits · CPC title

• G06F13/4027 Primary

  using bus bridges (G06F13/4022 takes precedence) · CPC title