Display control apparatus and display device

Patent metadata

Field	Value
Publication number	US-11423859-B2
Application number	US-201817043530-A
Country	US
Kind code	B2
Filing date	Nov 28, 2018
Priority date	Nov 12, 2018
Publication date	Aug 23, 2022
Grant date	Aug 23, 2022

Abstract

A display control apparatus includes a data driver, a timing controller, and a control circuit. The data driver a data output circuit that is configured to output data signals. The timing controller is configured to output data control signals that control the signal input of the data driver and include a frame start signal VS1 and a conventional signal VS2. The control circuit is electrically connected with the timing controller and the data output circuit (211), and is configured to input signals to the data output circuit according to the data control signals.

First claim

What is claimed is:

1. A display control apparatus, comprising:
a data driver comprising a data output circuit, wherein the data output circuit is configured to output a data signal;
a timing controller configured to output a data control signal, wherein the data control signal controls signal input of the data driver, the data control signal comprises a frame start signal and a normal signal, the frame start signal is located at a start position of a frame, and the normal signal is after the frame start signal in the same frame; and
a control circuit electrically connected to the timing controller and the data output circuit, and configured to input a signal to the data output circuit according to the data control signal,
wherein
when the data control signal is the frame start signal, the control circuit inputs a first current to the data output circuit according to the data control signal; or when the data control signal is the normal signal, the control circuit inputs a second current to the data output circuit according to the data control signal, and the first current is greater than the second current;
the control circuit comprises a first circuit and a second circuit connected in parallel;
when the data control signal is the frame start signal, the first circuit inputs the first current to the data output circuit according to the data control signal, and the second circuit is open; or when the data control signal is the normal signal, the second circuit inputs the second current to the data output circuit according to the data control signal, and the first circuit is open;
the first circuit comprises a first switch device and a first current source electrically connected to each other, and the second circuit comprises a second switch device and a second current source electrically connected to each other;
the first switch device is electrically connected to the timing controller and the data output circuit; and the second switch device is electrically connected to the timing controller and the data output circuit;
the first current source is configured to output the first current, and the second current source is configured to output the second current; and
when the data control signal is the frame start signal, the first switch device is switched on, the second switch device is switched off, and the first current source inputs the first current to the data output circuit; or when the data control signal is the normal signal, the second switch device is switched on, the first switch device is switched off, and the second current source inputs the second current to the data output circuit.

2. The display control apparatus according to claim 1 , wherein a duration of the frame start signal is less than a duration of the normal signal.

3. The display control apparatus according to claim 2 , wherein a level of the normal signal is lower than a level of the frame start signal.

4. The display control apparatus according to claim 3 , wherein the display control apparatus further comprises a scanning driver configured to output a scanning signal, and the data control signal is an input signal of the scanning driver.

5. The display control apparatus according to claim 4 , wherein the duration of the frame start signal is the same as duration of a row of scanning signals of the scanning driver.

6. The display control apparatus according to claim 1 , wherein both the first switch device and the second switch device are switch devices of a same type.

7. The display control apparatus according to claim 6 , wherein the first switch device and the second switch device are field effect transistors of two different conductive types.

8. The display control apparatus according to claim 7 , wherein the first switch device is an N-type field effect transistor, and the second switch device is a P-type field effect transistor.

9. The display control apparatus according to claim 7 , wherein the first switch device is a P-type field effect transistor, and the second switch device is an N-type field effect transistor.

10. The display control apparatus according to claim 1 , wherein both the first switch device and the second switch device are tri-terminal switch devices.

11. The display control apparatus according to claim 1 , wherein a level of the normal signal is higher than a level of the frame start signal.

12. The display control apparatus according to claim 1 , wherein a duration of the frame start signal is greater than a duration of the normal signal.

13. The display control apparatus according to claim 1 , wherein the data output circuit comprises an operation amplifier and a data output end, the control circuit is electrically connected to the operation amplifier, and the operation amplifier is located between the control circuit and the data output end.

14. The display control apparatus according to claim 1 , wherein the control circuit is located in the data driver.

15. The display control apparatus according to claim 1 , wherein the control circuit is located in the timing controller.

16. The display control apparatus according to claim 1 , wherein the display control apparatus further comprises a scanning driver configured to output a scanning signal, and the control circuit is located in the scanning driver.

17. A display control apparatus, comprising:
a scanning driver configured to output a scanning signal;
a data driver comprising a data output circuit, wherein the data output circuit is configured to output a data signal;
a timing controller configured to output a data control signal, wherein the data control signal is an input signal of the scanning driver and controls signal input of the data driver; and the data control signal comprises a frame start signal and a normal signal, the frame start signal is located at a start position of a frame, the normal signal is after the frame start signal in the same frame, and a level of the frame start signal is higher than a level of the normal signal; and
a control circuit, comprising an N-type field effect transistor, a first current source, a P-type field effect transistor, and a second current source, wherein
a gate electrode of the N-type field effect transistor is electrically connected to the timing controller and receives the data control signal, a source electrode of the N-type field effect transistor is electrically connected to the first current source, and a drain electrode of the N-type field effect transistor is electrically connected to the data output circuit;
a gate electrode of the P-type field effect transistor is electrically connected to the timing controller and receives the data control signal, a source electrode of the P-type field effect transistor is electrically connected to the second current source, and a drain electrode of the P-type field effect transistor is electrically connected to the data output circuit; and
a current output by the first current source is greater than a current output by the second current source.

18. A display device, comprising a display control apparatus and a display panel, wherein
the display control apparatus comprises:
a data driver comprising a data output circuit, wherein the data output circuit is configured to output a data signal;
a timing controller configured to output a data control signal, wherein the data control signal controls signal input of the data driver, the data control signal comprises a frame start signal and a normal signal, the frame start signal is located at a start position of a frame, and the normal signal is after th

Assignees

• Hkc Corp Ltd

Inventors

• Wang Mingliang

Classifications

• G09G3/3677

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• G09G3/36 Primary

  using liquid crystals · CPC title

• G09G3/3688 Primary

  suitable for active matrices only · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2320/0252

  Improving the response speed · CPC title