Device and computer realizing calculation of reservoir layer of reservoir computing

Patent metadata

Field	Value
Publication number	US-11423299-B2
Application number	US-201816204461-A
Country	US
Kind code	B2
Filing date	Nov 29, 2018
Priority date	Nov 30, 2017
Publication date	Aug 23, 2022
Grant date	Aug 23, 2022

Abstract

A device includes an input unit, a nonlinear converter, and an output unit. The nonlinear converter and the output unit are connected via a connection path having a delay mechanism that realizes a feedback loop giving a delay to a signal. The delay mechanism includes a conversion mechanism that generates a plurality of signals with different delay times using the signal output from the nonlinear converter, generates a new signal by superimposing the plurality of signals, and outputs the generated signal to the output unit.

First claim

What is claimed is:

1. A device that realizes calculation of a reservoir layer of reservoir computing, and comprises:
an input unit;
a nonlinear converter; and
an output unit, wherein
the nonlinear converter and the output unit are connected via a connection path having a delay mechanism that realizes a feedback loop giving a delay to a signal to be propagated,
the input unit outputs a first signal generated by superimposing processing results of an input signal and a previous input signal output from the output unit to the nonlinear converter,
the nonlinear converter outputs a second signal obtained by executing nonlinear conversion on the first signal,
the output unit generates a third signal based on a signal received via the connection path, outputs the third signal to the input unit as a processing result of the previous input signal, and outputs the third signal to an external device, and
the delay mechanism includes a conversion mechanism that generates a plurality of fourth signals with different delay times using the second signal, generates a fifth signal by superimposing the plurality of fourth signals, and outputs the fifth signal to the output unit.

2. The device according to claim 1 , wherein
the conversion mechanism is realized using one of a plurality of signal paths with different lengths and a signal path in which a plurality of modes with different propagation speeds are settable.

3. The device according to claim 2 , wherein
the conversion mechanism changes an intensity of at least one of the fourth signals and superimposes the plurality of fourth signals.

4. A computer that executes calculation of reservoir computing, and comprises:
an input device configured to realize calculation of an input layer of the reservoir computing;
a reservoir device configured to realize calculation of a reservoir layer of the reservoir computing; and
an output device configured to realize calculation of an output layer of the reservoir computing,
wherein the reservoir device includes an input unit, a nonlinear converter, and an output unit, wherein
the nonlinear converter and the output unit are connected via a connection path having a delay mechanism that gives a time delay to a signal propagating from the nonlinear converter to the output unit,
the input unit outputs a first signal generated by superimposing processing results of an input signal output from the input device and a previous input signal output from the output unit to the nonlinear converter,
the nonlinear converter outputs a second signal obtained by executing nonlinear conversion on the first signal,
the output unit generates a third signal based on a signal received via the connection path, outputs the third signal to the output unit as a processing result of the previous input signal, and outputs the third signal to an external device, and
the delay mechanism includes a conversion mechanism that generates a plurality of fourth signals with different delay times using the second signal, generates a fifth signal by superimposing the plurality of fourth signals, and outputs the fifth signal to the output unit.

5. The computer according to claim 4 , wherein
the conversion mechanism is realized using one of a plurality of signal paths with different lengths and a signal path in which a plurality of modes with different propagation speeds are settable.

6. The computer according to claim 5 , wherein
the conversion mechanism changes an intensity of at least one of the fourth signals and superimposes the plurality of fourth signals.

7. The computer according to claim 6 , wherein
the output device delays a read timing of the third signal than an output timing of the third signal by a minute time.

Assignees

• Hitachi Ltd

Inventors

• Okumura Tadashi
• Tai Mitsuharu
• Ando Masahiko
• NAGATA Sanato
• Kameshiro Norifumi

Classifications

• G06N3/044 Primary

  Recurrent networks, e.g. Hopfield networks · CPC title

• G06N3/08 Primary

  Learning methods · CPC title

• G02F1/21

  by interference · CPC title

• G02F1/212

  Mach-Zehnder type · CPC title