Semiconductor wafer of monocrystalline silicon and method of producing the semiconductor wafer
US-2020168712-A1 · May 28, 2020 · US
US11417733B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11417733-B2 |
| Application number | US-201816636352-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 19, 2018 |
| Priority date | Aug 4, 2017 |
| Publication date | Aug 16, 2022 |
| Grant date | Aug 16, 2022 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer;an oxygen concentration of the substrate wafer of not less than 5.3×1017 atoms/cm3 and not more than 6.0×1017 atoms/cm3;a resistivity of the substrate wafer of not less than 5 mΩcm and not more than 10 mΩcm; andthe potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.
Opening claim text (preview).
The invention claimed is: 1. An epitaxially coated semiconductor wafer of monocrystalline silicon, comprising: a p + -doped substrate wafer; a p-doped epitaxial layer of monocrystalline silicon which covers an upper face of the substrate wafer; an oxygen concentration of the substrate wafer of not less than 5.3×10 17 atoms/cm 3 and not more than 6.0×10 17 atoms/cm 3 ; a resistivity of the substrate wafer of not less than 5 mΩcm and not more than 10 mΩcm; and a potential of the substrate wafer to form BMDs (bulk microdefects) as a result of a two-stage heat treatment of the epitaxially coated semiconductor wafer, where the density of BMDs has a maximum of not less than 2×10 10 /cm 3 , the distance of the maximum from a front side of the epitaxially coated semiconductor wafer is not greater than 20 μm, and the ratio of the densities of BMDs at a distance of 20 μm and at a distance of 60 μm from the front side of the epitaxially coated semiconductor wafer is not less than 5, and the two-stage heat treatment is effected at 850° C. over a period of one hour in oxygen and at 1000° C. over a period of one hour in oxygen. 2. The epitaxially coated semiconductor wafer of claim 1 , wherein the epitaxial layer has a thickness of not less than 1 μm and not more than 5 μm. 3. The epitaxially coated semiconductor water of claim 1 , having a denuded zone having a thickness of not less than 3 μm and not more than 7 μm. 4. The epitaxially coated semiconductor wafer of claim 2 , having a denuded tone having a thickness of not less than 3 μm and not more than 7 μm.
Monocrystalline · CPC title
P-type · CPC title
Silicon, silicon germanium or germanium · CPC title
Structures · CPC title
Silicon, silicon germanium or germanium · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.