Implementing embedded wire repair for PCB constructs

US11412612B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11412612-B2
Application numberUS-201916508945-A
CountryUS
Kind codeB2
Filing dateJul 11, 2019
Priority dateJul 26, 2018
Publication dateAug 9, 2022
Grant dateAug 9, 2022

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Methods and structures are provided for implementing embedded wire repair for printed circuit board (PCB) constructs. A repair wire layer is provided within the PCB stack with reference planes on opposite sides of the repair wire layer. When a repair connection is required, an appropriate plated through hole (PTH) is drilled to form the repair connection using the repair wire layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A structure for implementing embedded wire repair for printed circuit board (PCB) constructs comprising: a printed circuit board (PCB); the printed circuit board (PCB) having a repair wire layer within a PCB stack with reference planes on opposite sides of the repair wire layer; an appropriate plated through hole (PTH) forming a repair connection using the repair wire layer when a repair connection is required, wherein the repair connection enables controlled impedance with the reference planes disposed at a fixed distance from the repair wire layer. 2. The structure as recited in claim 1 wherein the repair wire layer includes an embedded isolated internal conductor. 3. The structure as recited in claim 2 wherein the repair wire layer includes the isolated internal conductor separated from plated through holes (PTHs) in the PCB stack. 4. The structure as recited in claim 1 wherein the repair wire layer includes an embedded isolated conductive wire mesh. 5. The structure as recited in claim 1 wherein the repair wire layer includes an embedded isolated twisted-pair mesh. 6. The structure as recited in claim 1 wherein said repair wire layer includes an embedded isolated embroidered wire mesh. 7. The structure as recited in claim 1 wherein the repair connection provides enhanced channel performance over repair work at a surface level of the PCB stack. 8. The structure as recited in claim 1 wherein the repair wire layer includes an electrically conductive mesh formed of a selected material from a group including copper, copper plated with nickel, and aluminum. 9. The structure as recited in claim 1 wherein the repair wire layer includes multiple individual embedded wires isolated from all other wiring layers with respective individual embedded wires routed to respective plated through holes (PTHs) in the PCB stack.

Assignees

Inventors

Classifications

  • Drilling of holes · CPC title

  • Use of materials for the {conductive, e.g. } metallic pattern · CPC title

  • Monitoring a manufacturing process · CPC title

  • Manufacturing multilayer circuits · CPC title

  • Mesh conductors, e.g. as a ground plane · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11412612B2 cover?
Methods and structures are provided for implementing embedded wire repair for printed circuit board (PCB) constructs. A repair wire layer is provided within the PCB stack with reference planes on opposite sides of the repair wire layer. When a repair connection is required, an appropriate plated through hole (PTH) is drilled to form the repair connection using the repair wire layer.
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H05K3/225. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 09 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).