Power module

US11410914B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11410914-B2
Application numberUS-202016926008-A
CountryUS
Kind codeB2
Filing dateJul 10, 2020
Priority dateSep 24, 2019
Publication dateAug 9, 2022
Grant dateAug 9, 2022

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A power module includes: a base plate having a first surface; electrode plate provided at the first surface; a wire connected to a semiconductor chip and the electrode plate; a metal member connected to the electrode plate; a terminal plate; a first resin layer, a connection portion of the wire and the semiconductor chip being disposed inside the first resin layer; and a second resin layer provided on the first resin layer and having a lower elastic modulus than the first resin layer. The terminal plate includes a bonding portion contacting an upper surface of the metal member, a curved portion curved upward from the bonding portion. The curved portion is disposed inside the second resin layer, and a length from the first surface of a lower surface of the bonding portion is greater than a length from the first surface of the connection portion.

First claim

Opening claim text (preview).

What is claimed is: 1. A power module, comprising: a base plate having a first surface; a plurality of electrode plates provided at the first surface; a semiconductor chip provided on the first surface; a wire connected to the semiconductor chip and one of the electrode plates; a metal member connected to one of the electrode plates; a terminal plate including a bonding portion, a curved portion, a first intermediate portion, a second intermediate portion, and a draw-out portion, the terminal plate being formed by stamping and bending a copper plate, the bonding portion contacting an upper surface of the metal member and extending along the upper surface, the curved portion being curved upward from the bonding portion, the first intermediate portion extending upward in a vertical direction from the curved portion, the second intermediate portion extending along the first surface of the base plate from the first intermediate portion, the draw-out portion being drawn out externally from the second intermediate portion; a first resin layer, a connection portion of the wire and the semiconductor chip being disposed inside the first resin layer; and a second resin layer provided on the first resin layer, the curved portion being disposed inside the second resin layer, an elastic modulus of the second resin layer being less than an elastic modulus of the first resin layer, a length from the first surface to a lower surface of the bonding portion being greater than a length from the first surface to the connection portion, wherein a wedge-like gap is formed between the lower surface of the curved portion of the terminal plate and the upper surface of the metal member, and the second resin layer enters the wedge-like gap. 2. The module according to claim 1 , wherein an upper surface of the first resin layer is positioned higher than the connection portion and positioned lower than the bonding portion. 3. The module according to claim 1 , further comprising a bonding member contacting the metal member and the one of the electrode plates. 4. The module according to claim 1 , wherein a thermal expansion coefficient of the first resin layer is less than a thermal expansion coefficient of the second resin layer. 5. The module according to claim 1 , wherein the first resin layer includes an epoxy resin. 6. The module according to claim 1 , wherein the second resin layer is a gel. 7. The module according to claim 1 , wherein the bonding portion of the terminal plate is bonded to the upper surface of the metal member by ultrasonic bonding. 8. The module according to claim 1 , wherein the wire is formed of aluminum. 9. The module according to claim 1 , further comprising a connection effect portion that has reduced bendability, and formed at an end portion of the wire at the connection effect portion side by connecting the connection portion and the semiconductor chip, and the length from the first surface to the lower surface of the bonding portion is greater than a length from the first surface to an upper end of the connection effect portion. 10. The module according to claim 9 , wherein an upper surface of the first resin layer is positioned higher than an upper end of the connection effect portion.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • using a polymer adhesive, e.g. an adhesive based on silicone or epoxy · CPC title

  • Die-attach connectors and bond wires · CPC title

  • Package configurations · CPC title

  • by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation · CPC title

Patent family

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External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11410914B2 cover?
A power module includes: a base plate having a first surface; electrode plate provided at the first surface; a wire connected to a semiconductor chip and the electrode plate; a metal member connected to the electrode plate; a terminal plate; a first resin layer, a connection portion of the wire and the semiconductor chip being disposed inside the first resin layer; and a second resin layer prov…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10W70/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 09 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).