Dual architecture function pointers having consistent reference addresses

US11403100B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11403100-B2
Application numberUS-202017008163-A
CountryUS
Kind codeB2
Filing dateAug 31, 2020
Priority dateAug 31, 2020
Publication dateAug 2, 2022
Grant dateAug 2, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Using a common reference address when processing calls among a native ABI and a foreign ABI. Based on caller calling using a reference address, a lookup structure is used to determine whether the reference address is within a memory range storing native code (and that the callee is native) or a memory range not storing native code (and that the callee is foreign). Execution of the callee is initiated based on one of (i) when the caller is native and when the callee is foreign, calling the callee using the reference address within an emulator; (ii) when the caller is foreign and the callee is native, calling an entry thunk; (iii) when the caller is native and the callee is foreign, calling an exit thunk; or (iv) when the caller is native and the callee is native, directly calling the callee using the reference address.

First claim

Opening claim text (preview).

What is claimed: 1. A method, implemented at a computer system that includes a processor implementing a native instruction set architecture (ISA), for using a common reference memory address when processing calls within a process that supports execution of both (i) native code targeting a native application binary interface (ABI) that corresponds to the native ISA and that has a first calling convention, and (ii) foreign code targeting a foreign ABI that corresponds to a foreign ISA and that has a second calling convention, the method comprising: based at least on identifying a call that targets a reference memory address for a callee function, determining whether the callee function corresponds to the native ABI or to the foreign ABI, wherein: the callee function is determined to correspond to the native ABI based on one of (i) a lookup structure indicating that the reference memory address is contained within a first memory range storing native code, or (ii) a fast-forward sequence being identified at the reference memory address, and the callee function is determined to correspond to the foreign ABI based at least on the lookup structure indicating that the reference memory address is contained within a second memory range not storing native code; and based at least on the determining, initiating execution of the callee function based on performing one of: when a caller function corresponds to the foreign ABI, and when the callee function is determined to correspond to the foreign ABI, directly calling the callee function using the reference memory address within an emulator; when the caller function corresponds to the foreign ABI, and when the callee function is determined to correspond to the native ABI, calling an entry thunk that (i) adapts a second calling convention to the first calling convention and then (ii) directly calls the callee function using the reference memory address; when the caller function corresponds to the native ABI, and when the callee function is determined to correspond to the foreign ABI, calling an exit thunk that (i) adapts a first calling convention of the native ABI to a second calling convention of the foreign ABI and then (ii) invokes the emulator to directly call the callee function using the reference memory address; or when the caller function corresponds to the native ABI, and when the callee function is determined to correspond to the native ABI, directly calling the callee function using the reference memory address. 2. The method of claim 1 , wherein the caller function corresponds to the foreign ABI and the callee function is determined to correspond to the foreign ABI, and wherein initiating execution of the callee function comprises directly calling the callee function using the reference memory address within the emulator. 3. The method of claim 1 , wherein the caller function corresponds to the foreign ABI and the callee function is determined to correspond to the native ABI, and wherein initiating execution of the callee function comprises calling the entry thunk. 4. The method of claim 3 , further comprising identifying a location of the entry thunk based at least on (i) reading a block of memory immediately preceding the reference memory address, and (ii) determining from the block of memory an offset or a pointer to the location of entry thunk. 5. The method of claim 1 , wherein the caller function corresponds to the native ABI and the callee function is determined to correspond to the foreign ABI, and wherein initiating execution of the callee function comprises calling the exit thunk. 6. The method of claim 5 , wherein a location of the exit thunk is contained within the caller function. 7. The method of claim 1 , wherein the caller function corresponds to the native ABI and the callee function is determined to correspond to the native ABI, and wherein initiating execution of the callee function comprises directly calling the callee function using the reference memory address. 8. The method of claim 1 , further comprising, when the fast-forward sequence is identified at the reference memory address, updating the reference memory address with a new reference memory address obtained from the fast-forward sequence. 9. The method of claim 1 , further comprising, when the lookup structure indicates that the reference memory address is contained within the second memory range not storing native code, determining whether the fast-forward sequence is identifiable at the reference memory address. 10. The method of claim 1 , wherein the lookup structure comprises at least one of a bitmap, a hash table, or a binary tree. 11. A computer system for using a common reference memory address when processing calls within a process that supports execution of both (i) native code targeting a native application binary interface (ABI) that corresponds to a native instruction set architecture (ISA) and that has a first calling convention, and (ii) foreign code targeting a foreign ABI that corresponds to a foreign ISA and that has a second calling convention, comprising: a processor implementing the native ISA; and a hardware storage device that stores computer-executable instructions that are executable by the processor to cause the computer system to perform at least the following: based at least on identifying a call that targets a reference memory address for a callee function, determine whether the callee function corresponds to the native ABI or to the foreign ABI, wherein: the callee function is determined to correspond to the native ABI based on one of (i) a lookup structure indicating that the reference memory address is contained within a first memory range storing native code, or (ii) a fast-forward sequence being identified at the reference memory address, and the callee function is determined to correspond to the foreign ABI based at least on the lookup structure indicating that the reference memory address is contained within a second memory range not storing native code; and based at least on the determining, initiate execution of the callee function based on performing one of: when a caller function corresponds to the foreign ABI, and when the callee function is determined to correspond to the foreign ABI, directly calling the callee function using the reference memory address within an emulator; when the caller function corresponds to the foreign ABI, and when the callee function is determined to correspond to the native ABI, calling an entry thunk that (i) adapts a second calling convention to the first calling convention and then (ii) directly calls the callee function using the reference memory address; when the caller function corresponds to the native ABI, and when the callee function is determined to correspond to the foreign ABI, calling an exit thunk that (i) adapts a first calling convention of the native ABI to a second calling convention of the foreign ABI and then (ii) invokes the emulator to directly call the callee function using the reference memory address; or when the caller function corresponds to the native ABI, and when the callee function is determined to correspond to the native ABI, directly calling the callee function using the reference memory address. 12. The computer system of claim 11 , wherein the caller function corresponds to the foreign ABI and the callee function is determined to correspond to the foreign ABI, and wherein initiating execution of the callee function comprises directly calling the callee function using the reference memory address within the emulator. 13. The computer system of claim 11 , wherein the caller function corresponds to the foreign ABI and

Assignees

Inventors

Classifications

  • Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators · CPC title

  • Involving translation to a different instruction set architecture, e.g. just-in-time translation in a JVM · CPC title

  • Executing subprograms · CPC title

  • Program loading or initiating (bootstrapping G06F9/4401; security arrangements for program loading or initiating G06F21/57) · CPC title

  • Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines · CPC title

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What does patent US11403100B2 cover?
Using a common reference address when processing calls among a native ABI and a foreign ABI. Based on caller calling using a reference address, a lookup structure is used to determine whether the reference address is within a memory range storing native code (and that the callee is native) or a memory range not storing native code (and that the callee is foreign). Execution of the callee is ini…
Who is the assignee on this patent?
Microsoft Technology Licensing Llc
What technology area does this patent fall under?
Primary CPC classification G06F9/44542. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 02 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).