Component carrier with an etching neck connecting back drill hole with vertical through connection

US11399432B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11399432-B2
Application numberUS-202117248109-A
CountryUS
Kind codeB2
Filing dateJan 8, 2021
Priority dateJan 14, 2020
Publication dateJul 26, 2022
Grant dateJul 26, 2022

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A component carrier includes a stack with a plurality of electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures include an electrically conductive vertical through-connection and a horizontally extending electrically conductive trace electrically coupled with an end portion of the vertical through-connection. A back-drill hole extends through at least part of the at least one electrically insulating layer structure towards the end portion of the vertical through-connection. An etching neck connects the back-drill hole with the end portion of the vertical through-connection.

First claim

Opening claim text (preview).

The invention claimed is: 1. A component carrier, comprising: a stack comprising a plurality of electrically conductive layer structures and at least one electrically insulating layer structure; wherein the electrically conductive layer structures comprise an electrically conductive vertical through-connection and a horizontally extending electrically conductive trace electrically coupled with an end portion of the vertical through-connection; a back-drill hole extending through at least part of the at least one electrically insulating layer structure towards the end portion; and an etching neck extending from the back-drill hole to the end portion of the vertical through-connection, the etching neck defined by a surface of the at least one electrically insulating layer structure, wherein the vertical through-connection comprises an electrically conductive stub between the etching neck and the electrically conductive trace, and wherein a length of the electrically conductive stub is larger than a length of the etching neck. 2. The component carrier according to claim 1 , comprising at least one of the following features: wherein the vertical through-connection is a plated via; a pad electrically connecting the electrically conductive trace with the vertical through-connection; wherein a vertical length of the stub is not more than 0.2 mm; wherein the end portion of the vertical through-connection is burr-free; wherein the back-drill hole comprises a cylindrical section; wherein the back-drill hole comprises a conical or frustoconical section between the cylindrical section and the etching neck; wherein the etching neck has one of a cylindrical shape and a frustoconical shape; wherein a diameter of the etching neck is smaller than a diameter of the back-drill hole; wherein the vertical through-connection is configured as one of a cylindrical electrically conductive structure and a hollow cylindrical electrically conductive structure; wherein the component carrier is configured for high-frequency applications; at least one electronic component coupled to the at least one electrically conductive layer structures; wherein the at least one electronic component comprises a radio-frequency semiconductor chip, configured for emitting and/or receiving radio-frequency signals, mounted on and/or embedded in the stack and being electrically coupled with the electrically conductive trace and the vertical through-connection. 3. The component carrier according to claim 1 , further comprising: a test structure which comprises at least one horizontally extending electrically conductive trace at a vertical level of and connected to the etching neck. 4. The component carrier according to claim 3 , wherein the test structure is configured so that applying an electric test signal to one of the group consisting of the electrically conductive trace and the at least one horizontally extending electrically conductive trace connected to the etching neck and detecting a response signal indicative of a functioning of the back-drill hole and/or the etching neck. 5. The component carrier according to claim 1 , comprising at least one of the following features: at least one component being surface mounted on and/or embedded in the component carrier, wherein the at least one component is selected from a group consisting of an electronic component, an electrically non-conductive and/or electrically conductive inlay, a heat transfer unit, a light guiding element, an optical element, a bridge, an energy harvesting unit, an active electronic component, a passive electronic component, an electronic chip, a storage device, a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter, a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, an actuator, a microelectromechanical system, a microprocessor, a capacitor, a resistor, an inductance, an accumulator, a switch, a camera, an antenna, a magnetic element, a further component carrier, and a logic chip; wherein at least one of the electrically conductive layer structures of the component carrier comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, and tungsten; wherein the at least one electrically insulating layer structure comprises at least one of the group consisting of reinforced or non-reinforced resin, epoxy resin or bismaleimide-triazine resin, FR-4, FR-5, cyanate-ester based resin, polyphenylene derivate, glass, prepreg material, polyimide, polyamide, liquid crystal polymer, epoxy-based build-up film, polytetrafluoroethylene, a ceramic, and a metal oxide; wherein the component carrier is shaped as a plate; wherein the component carrier is configured as one of the group consisting of a printed circuit board, a substrate, and an interposer; wherein the component carrier is configured as a laminate-type component carrier. 6. A method of manufacturing a component carrier, comprising: providing a stack comprising a plurality of electrically conductive layer structures and at least one electrically insulating layer structure; forming the electrically conductive layer structures with an electrically conductive vertical through-connection and a horizontally extending electrically conductive trace electrically coupled with the vertical through-connection; drilling a back-drill hole through at least part of the at least one electrically insulating layer structure and into the vertical through-connection; and etching an etching neck between the back-drill hole and an end portion of the vertical through-connection, the etching neck defined by a surface of the at least one electrically insulating layer structure, wherein the vertical through-connection comprises an electrically conductive stub between the etching neck and the electrically conductive trace, and wherein a length of the electrically conductive stub is larger than a length of the etching neck. 7. The method according to claim 6 , wherein etching the etching neck comprises wet etching. 8. The method according to claim 7 , wherein etching the etching neck comprises alkaline etching or acid etching. 9. The method according to claim 6 , wherein etching the etching neck comprises dry etching. 10. The method according to claim 9 , wherein dry etching comprises plasma etching. 11. The method according to claim 6 , further comprising: cleaning the back-drill hole with a rinse. 12. The method according to claim 6 , wherein drilling comprises mechanically drilling the back-drill hole. 13. The method according to claim 6 , further comprising: applying an electric test signal to one of the group consisting of the electrically conductive trace and at least one horizontally extending electrically conductive trace provided at a vertical level of and connected to the etching neck; detecting a response signal at another one of the group consisting of the electrically conductive trace and the at least one horizontally extending electrically conductive dummy trace; and determining information indicative of a functioning of the back-drill hole and/or the etching neck based on the detected response signal. 14. A component carrier, comprising: a stack comprising a plurality of electrically conductive layer structures and at least one electrically insulating layer structure; wherein the electrically conductive layer structures comprise an electrically conductive vertical through-connection and a horizontally extending electrically conductive trace electrically coupled wi

Assignees

Inventors

Classifications

  • Components for radio transmission, e.g. radio frequency identification [RFID] tag, printed or non-printed antennas · CPC title

  • H05K1/02Primary

    Details · CPC title

  • Drilling of holes · CPC title

  • Plated through-holes or blind vias without lands · CPC title

  • for electrical inspection or testing · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11399432B2 cover?
A component carrier includes a stack with a plurality of electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures include an electrically conductive vertical through-connection and a horizontally extending electrically conductive trace electrically coupled with an end portion of the vertical through-connectio…
Who is the assignee on this patent?
At & S Austria Tech & Systemtechnik Ag
What technology area does this patent fall under?
Primary CPC classification H05K1/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 26 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).