Wide band gap power semiconductor system and driving method thereof

Patent metadata

Field	Value
Publication number	US-11394372-B2
Application number	US-202017092843-A
Country	US
Kind code	B2
Filing date	Nov 9, 2020
Priority date	Nov 14, 2019
Publication date	Jul 19, 2022
Grant date	Jul 19, 2022

Abstract

This application relates to a wide band gap (WBG) power semiconductor system. In one aspect, the system includes a controller configured to generate a switching control signal and a gate driver configured to receive the switching control signal and generate a switching drive signal in response to the switching control signal. The system also includes a WBG power semiconductor device coupled to the gate driver, comprising a gate terminal for receiving the switching drive signal, and configured to be switched in response to the switching drive signal. The switching drive signal has one of three signal levels: a first voltage level higher than a zero voltage level, a second voltage level lower than the zero voltage level, and the zero voltage level at an arbitrary instant. As a result, the gate driver drives the WBG power semiconductor device with the three voltage levels.

First claim

What is claimed is:

1. A wide band gap (WBG) power semiconductor system, comprising:
a controller configured to generate a switching control signal;
a gate driver configured to receive the switching control signal and generate a switching drive signal by amplifying and level-shifting the received switching control signal; and
a WBG power semiconductor device coupled to the gate driver and comprising a gate terminal configured to receive the switching drive signal, the WBG power semiconductor device configured to be switched in response to the switching drive signal,
wherein the switching drive signal has one of three signal levels: a first voltage level higher than a zero voltage level, a second voltage level lower than the zero voltage level, and the zero voltage level at an arbitrary instant, so that the gate driver drives the WBG power semiconductor device with the three signal levels, and
wherein the gate driver is further configured to:
supply the switching drive signal having the first voltage level to the gate terminal of the WBG power semiconductor device during a first time interval to turn on the WBG power semiconductor device;
supply the switching drive signal having the second voltage level to the gate terminal of the WBG power semiconductor device during a second time interval in response to the switching control signal received from the controller, wherein the second time interval is longer than the first time interval; and
supply the switching drive signal having the zero voltage level to the gate terminal of the WBG power semiconductor device during a third time interval.

2. The WBG power semiconductor system of claim 1 , wherein, in a course of supplying the switching drive signal of the first voltage level to the gate terminal of the WBG power semiconductor device, the gate driver is configured to change a level of the switching drive signal to the second voltage level to turn off the WBG power semiconductor device and then change the level of the switching drive signal back to the zero voltage level after a predetermined time interval.

3. The WBG power semiconductor system of claim 2 , wherein the WBG power semiconductor device further comprises a source terminal, and
wherein a voltage between the gate terminal and the source terminal of the WBG power semiconductor device is configured to transition from the first voltage level to the second voltage level when the switching drive signal transitions from the first voltage level to the second voltage level, and maintain the zero voltage level after a predetermined time.

4. The WBG power semiconductor system of claim 3 , wherein the WBG power semiconductor device further comprises a drain terminal, and
wherein a current flowing between the drain terminal and the source terminal of the WBG power semiconductor device is configured to be cut off as the voltage between the gate terminal and the source terminal of the WBG power semiconductor device transitions to the second voltage level.

5. The WBG power semiconductor system of claim 1 , wherein the gate driver is configured to maintain the switching drive signal having the second voltage level to be lower than a threshold of the WBG power semiconductor device so as to prevent a malfunction of the WBG power semiconductor device.

6. The WBG power semiconductor system of claim 1 , wherein the gate driver comprises a passive device circuit or an integrated circuit chip configured to adjust timing of supplying the zero voltage level to the gate terminal of the WBG power semiconductor device.

7. A method of driving of a wide band gap (WBG) power semiconductor device in a WBG power semiconductor system comprising a gate driver and the WBG power semiconductor device, the method comprising:
supplying, by the gate driver, a first voltage level higher than a zero voltage level to a gate terminal of the WBG power semiconductor device;
supplying, by the gate driver, a second voltage level lower than the zero voltage level to the gate terminal of the WBG power semiconductor device to turn off the WBG power semiconductor device; and
supplying, by the gate driver, the zero voltage level to the gate terminal of the WBG power semiconductor device after a predetermined time interval,
wherein the gate driver drives the WBG power semiconductor device with the three voltage levels, and
wherein the gate driver receives a switching control signal from a controller and generates the first, second and third voltage levels by amplifying and level-shifting the received switching control signal,
the method further comprising:
supplying, by the gate driver, the switching drive signal having the first voltage level to the gate terminal of the WBG power semiconductor device during a first time interval to turn on the WBG power semiconductor device;
supplying, by the gate driver, the switching drive signal having the second voltage level to the gate terminal of the WBG power semiconductor device during a second time interval in response to the switching control signal received from the controller, wherein the second time interval is longer than the first time interval; and
supplying, by the gate driver, the switching drive signal having the zero voltage level to the gate terminal of the WBG power semiconductor device during a third time interval.

8. The method of claim 7 , wherein driving the WBG power semiconductor device with the three voltage levels comprises:
changing a voltage between the gate terminal and a source terminal of the WBG power semiconductor device from the second voltage level to the zero voltage level and maintaining the zero voltage level after a predetermined time.

9. The method of claim 8 , wherein maintaining the zero voltage level comprises:
cutting off a current flowing between a drain terminal and the source terminal of the WBG power semiconductor device as the voltage between the gate terminal and the source terminal of the WBG power semiconductor device transitions to the second voltage level.

Assignees

• Korea Electronics Technology

Inventors

• Joo Dongmyoung
• Choi Junhyuk
• Park Joonsung
• Kim Jinhong
• Hyon Byongjo
• Noh Yongsu

Classifications

• H03K2217/0036

  Means reducing energy consumption · CPC title

• H03K17/163 Primary

  Soft switching · CPC title

• H03K17/687

  the devices being field-effect transistors · CPC title

• H03K3/012 Primary

  Modifications of generator to improve response time or to decrease power consumption · CPC title