Power amplifier circuit including multiple inverters connected in parallel

Patent metadata

Field	Value
Publication number	US-11387794-B2
Application number	US-201916729544-A
Country	US
Kind code	B2
Filing date	Dec 30, 2019
Priority date	Feb 19, 2019
Publication date	Jul 12, 2022
Grant date	Jul 12, 2022

Abstract

In each E-class inverter, an internal voltage detection circuit detects an internal voltage of a resonant type power supply circuit or a matching circuit and adjusts a phase of a driving signal of a MOSFET based on a detected voltage. It is thus possible to match a phase of a current voltage of a sine waveform of each inverter and combine power highly efficiently. Since power combining is performed highly efficiently without using a variable capacitor and variable inductor, it is possible to suppress upsizing of elements and achieve downsizing of a power amplifier circuit.

First claim

What is claimed is:

1. A power amplifier circuit for generating an AC output supplied to a load from a DC power, the power amplifier circuit comprising:
multiple inverters, each inverter including a resonant type power supply circuit, which has a switching element and generates the AC output from the DC power, and a matching circuit provided at an output side of the resonant type power supply circuit,
wherein:
the multiple inverters are connected in parallel such that the resonant type power supply circuit of the each inverter is connected in parallel with each other through the matching circuit of the each inverter;
the each inverter includes an internal voltage detection circuit for detecting an internal voltage of the resonant type power supply circuit or the matching circuit at a DC power supply side than an output of the matching circuit, and a phase adjusting circuit for adjusting a switching phase of the switching element based on a detection result of the internal voltage; and
the phase adjusting circuit includes a triangular signal generating circuit for generating a triangular signal based on a signal from a signal source, a DC bias circuit for generating an input voltage which is phase-adjusted by an application of a DC bias to an output of the triangular signal generating circuit, and a D type flip-flop for generating a driving signal which is phase-adjusted in response to the input voltage as a clock.

2. The power amplifier circuit according to claim 1 , wherein:
the resonant type power supply circuit is an E-class type.

3. The power amplifier circuit according to claim 1 , wherein:
the matching circuit is formed of a T-type LCC circuit, which includes an inductor, a first capacitor and a second capacitor.

4. The power amplifier circuit according to claim 3 , wherein:
the resonant type power supply circuit has an LC resonant circuit, which includes an inductor and capacitors; and
the inductor of the T-type LCC circuit is integrated with the inductor included in the LC resonant circuit.

5. The power amplifier circuit according to claim 3 , wherein:
the inductor and the second capacitor, which are included in the LCC resonant circuit, are connected in series between the DC power supply and the load, and the first capacitor included in the LCC resonant circuit is connected in parallel to the DC power supply between the inductor and the second capacitor; and
a reactance value X L1 of the inductor, a reactance value X C2 of the first capacitor and a reactance value X C3 of the second capacitor satisfies the following equations [1], [2] and [3], in which r 2 indicates an impedance determined by equally dividing the load by the number of the multiple inverters, r 1 indicates an input impedance at time when the impedance r 2 is connected relative to an output port of the matching circuit, k indicates an impedance conversion ratio of the matching circuit, and u indicates an imaginary part of a ratio between an in-phase admittance and an out-of-phase admittance forming an input admittance of the matching circuit,
X L1 =r 1 [√{ k (1+ u 2 )}+ u ]  [1]

X C2 =r 1 √{k (1+ u 2 )}  [2] and

X C3 =r 1 [√{ k (1+ u 2 )}+ ku ]  [3].

6. A power amplifier circuit for generating an AC output supplied to a load from a DC power, the power amplifier circuit comprising:
multiple inverters, each inverter including a resonant type power supply circuit, which has a switching element and generates the AC output from the DC power, and a matching circuit provided at an output side of the resonant type power supply circuit,
wherein:
the multiple inverters are connected in parallel such that the resonant type power supply circuit of the each inverter is connected in parallel with each other through the matching circuit of the each inverter;
the each inverter includes an internal voltage detection circuit for detecting an internal voltage of the resonant type power supply circuit or the matching circuit at a DC power supply side than an output of the matching circuit, and a phase adjusting circuit for adjusting a switching phase of the switching element based on a detection result of the internal voltage;
the matching circuit is formed of a T-type LCC circuit, which includes an inductor, a first capacitor and a second capacitor,
the inductor and the second capacitor, which are included in the LCC resonant circuit, are connected in series between the DC power supply and the load, and the first capacitor included in the LCC resonant circuit is connected in parallel to the DC power supply between the inductor and the second capacitor; and
a reactance value X L1 of the inductor, a reactance value X C2 of the first capacitor and a reactance value X C3 of the second capacitor satisfies the following equations [1], [2] and [3], in which r 2 indicates an impedance determined by equally dividing the load by the number of the multiple inverters, r 1 indicates an input impedance at time when the impedance r 2 is connected relative to an output port of the matching circuit, k indicates an impedance conversion ratio of the matching circuit, and u indicates an imaginary part of a ratio between an in-phase admittance and an out-of-phase admittance forming an input admittance of the matching circuit,
X L1 =r 1 [√{ k (1+ u 2 )}+ u ]  [1]

X C2 =r 1 √{k (1+ u 2 )}  [2] and

X C3 =r 1 [√{ k (1+ u 2 )}+ ku ]  [3].

Assignees

• Denso Corp
• National Univ Corporation Toyohashi Univ Of Technology

Inventors

• Sasaya Takanari
• Hirano Tetsuo
• Ohira Takashi
• Sakai Naoki
• Masaki Takaaki

Classifications

• H03F3/2176 Primary

  Class E amplifiers · CPC title

• H02M7/493 Primary

  the static converters being arranged for operation in parallel · CPC title

• H03F2200/387

  A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

• H03H7/38

  Impedance-matching networks · CPC title