Display, LED chip therefor, pixel therefor, controlling method therefor, computer program therefor

Patent metadata

Field	Value
Publication number	US-11386831-B2
Application number	US-202117174678-A
Country	US
Kind code	B2
Filing date	Feb 12, 2021
Priority date	Oct 22, 2014
Publication date	Jul 12, 2022
Grant date	Jul 12, 2022

Abstract

A display (100) comprising a plurality of LED chips (604), each LED chip (604) comprising a plurality of light emitting elements (606a-c). Each LED chip (604) is arranged such that a first light emitting element (606a) is configured to illuminate a sub-pixel, and a second light emitting element (606b) is configured to illuminate a sub-pixel using substantially the same wavelength of light as the first light emitting element. There is also described an LED chip, a display pixel, a controlling method, a computer device and a computer program for a display.

First claim

The invention claimed is:

1. A display comprising:
a substrate; and
a plurality of discrete light emitting diode (LED) chips, each discrete LED chip of a triangular shape and including a plurality light emitting elements configured to emit light having the same color, the plurality of discrete LED chips arranged on the substrate to form display pixels of the display, each display pixel including:
a first plurality of sub-pixels of a first color at corners of a first subset of the discrete LED chips,
a second plurality of sub-pixels of a second color at corners of a second subset of the discrete LED chips, and
a third plurality of sub-pixels of a third color at corners of a third subset of the discrete LED chips.

2. The display of claim 1 , further comprising an optical film disposed on at least one of the discrete LED chips, the optical film configured to direct light from the at least one of the discrete LED chips.

3. The display of claim 2 , wherein the optical film is configured to direct the light to a center of a display pixel.

4. The display of claim 1 , further comprising a processor configured to provide power to one of the two light emitting elements of each sub-pixel.

5. The display of claim 4 , wherein the processor is configured to provide power to a first light emitting element of the two light emitting elements responsive to a failure in a second light emitting element of the two light emitting elements.

6. The display of claim 1 , wherein the plurality of discrete LED chips include the same type of semiconductor material.

7. The display of claim 1 , wherein each of the plurality of discrete LED chips comprises Addressable Array Elements, each Addressable Array Element of a discrete LED chip providing a light emitting element.

8. The display of claim 1 , wherein the substrate is configured to provide control and power to the plurality of discrete LED chips.

9. The display of claim 1 , wherein the substrate includes an active matrix.

10. The display of claim 1 , wherein the substrate includes a passive matrix.

11. The display of claim 1 , wherein each discrete LED chip is located at an intersection of three adjacent display pixels.

12. The display of claim 1 , wherein the plurality of light emitting elements of each discrete LED chip share a common cathode.

13. The display of claim 1 , wherein a portion of the LED chips include quantum dot phosphors.

14. The display of claim 1 , wherein a first portion of the plurality of discrete LED chips emit red light, a second portion of the plurality of discrete LED chips emit blue light, and a third portion of the plurality of discrete LED chips emit green light.

Assignees

• Facebook Tech Llc
• Meta Platforms Tech Llc

Inventors

• Hughes Padraig
• Henry William
• O'Keeffe Joseph

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10H29/142

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

• H10H20/819

  characterised by their shape, e.g. curved or truncated substrates · CPC title

• G09G2300/0443

  with several sub-pixels for the same colour in a pixel, not specifically used to display gradations (G09G3/364 takes precedence) · CPC title

• G09G3/2088 Primary

  with use of a plurality of processors, each processor controlling a number of individual elements of the matrix · CPC title