Display substrate, method for manufacturing the same, and display device

Patent metadata

Field	Value
Publication number	US-11380719-B2
Application number	US-201916667382-A
Country	US
Kind code	B2
Filing date	Oct 29, 2019
Priority date	Oct 30, 2018
Publication date	Jul 5, 2022
Grant date	Jul 5, 2022

Abstract

Embodiments of the present disclosure provide a display substrate, a method for manufacturing a display substrate, and a display device. The method for manufacturing the display substrate includes: providing a seed layer on a first carrier substrate and forming a base substrate covering the seed layer; forming a first connection terminal on a side of the base substrate away from the first carrier substrate, the first connection terminal electrically connecting to the seed layer; removing the first carrier substrate to expose the seed layer; and forming a second connection terminal electrically connecting to the seed layer.

First claim

What is claimed is:

1. A method for manufacturing a display substrate, comprising:
providing a seed layer on a first carrier substrate and forming a base substrate covering the seed layer;
forming a first connection terminal on a side of the base substrate away from the first carrier substrate, the first connection terminal electrically connecting to the seed layer;
removing the first carrier substrate to expose the seed layer; and
forming a second connection terminal electrically connecting to the seed layer;
wherein, before forming the first connection terminal, the method further comprises:
forming at least one via hole, the at least one via hole at least extending through the base substrate; and
forming at least one injected electrically-conductive layer in the at least one via hole,
wherein the first connection terminal is electrically connected to the seed layer through the at least one injected electrically-conductive laver;
wherein the at least one via hole comprises a first via hole and a second via hole, the at least one injected electrically-conductive layer comprises a first injected electrically-conductive layer and a second injected electrically-conductive layer, and the method comprises:
forming the first via hole that extends through the base substrate to expose the seed layer, and forming the first injected electrically-conductive layer in the first via hole;
forming a thin film transistor on the side of the base substrate away from the first carrier substrate, an electrode of the thin film transistor being connected to the first injected electrically-conductive layer; and
forming the second via hole to expose the first injected electrically-conductive layer, and forming the second injected electrically-conductive layer that is connected to the first injected electrically-conductive layer in the second via hole,
wherein the first connection terminal is electrically connected to the seed layer through the first injected electrically-conductive layer and the second injected electrically-conductive layer.

2. The method according to claim 1 , wherein a material for forming the seed layer comprises at least one of Al, Mo, or Cu,
a material for forming the first injected electrically-conductive layer comprises Cu, and
a material for forming the second injected electrically-conductive layer comprises Cu.

3. The method according to claim 1 , wherein, before removing the first carrier substrate, the method further comprises: providing a second carrier substrate on a side of the first connection terminal away from the first carrier substrate.

4. The method according to claim 1 , wherein a sacrificial layer is formed between the seed layer and the first carrier substrate, and the removing the first carrier substrate is done by removing the sacrificial layer.

5. The method according to claim 3 , wherein a sacrificial layer is formed between the first connection terminal and the second carrier substrate, and removing the second carrier substrate is done by removing the sacrificial layer.

6. The method according to claim 1 , wherein a material for forming the base substrate comprises PI and the at least one via hole is formed by laser etching.

7. The method according to claim 1 , further comprising:
providing a light emitting diode on a side of the base substrate on which the second connection terminal is provided, an electrode of the light emitting diode being connected to the second connection terminal.

8. A display substrate, manufactured by the method according to claim 1 .

9. A display device, comprising the display substrate manufactured by the method according to claim 1 .

Assignees

• Boe Technology Group Co Ltd

Inventors

• Huang Hua
• Hsieh Changhan
• Di Muxin
• Zhu Xiaoyan

Classifications

• H10W90/00

  Package configurations · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/411

  characterised by materials, geometry or structure of the substrates · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10H20/857

  Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title