Techniques for efficiently operating a processing system based on energy characteristics of instructions and machine learning

Patent metadata

Field	Value
Publication number	US-11379708-B2
Application number	US-201916514078-A
Country	US
Kind code	B2
Filing date	Jul 17, 2019
Priority date	Aug 9, 2018
Publication date	Jul 5, 2022
Grant date	Jul 5, 2022

Abstract

An integrated circuit such as, for example a graphics processing unit (GPU), includes a dynamic power controller for adjusting operating voltage and/or frequency. The controller may receive current power used by the integrated circuit and a predicted power determined based on instructions pending in a plurality of processors. The controller determines adjustments that need to be made to the operating voltage and/or frequency to minimize the difference between the current power and the predicted power. An in-system reinforced learning mechanism is included to self-tune parameters of the controller.

First claim

The invention claimed is:

1. A GPU comprising:
parallel processors each including an instruction decoder that decodes instructions before execution and signals anticipated power usage of instruction execution;
a power controller that adjusts power supplied to the processors at least in part in response to the signaled anticipated power usage; and
a neural network that adapts the adjustment the power controller performs,
wherein the neural network performs reinforced learning to mitigate peak power scenarios.

2. The GPU of claim 1 wherein the instruction decoder comprises an instruction lookahead pre-decoder that predecodes instructions to be executed in the future and estimates how much power will be used to execute the instructions, and the parallel processors each include an additional instruction decoder that decodes the instructions for execution.

3. The GPU of claim 1 wherein the power controller is configured to decrease power to avoid peak power overshoot.

4. The GPU of claim 1 wherein the neural network controls the parallel processors to modify their instruction execution to reduce peak power requirements.

5. A processing system comprising:
a plurality of processors; and
power management circuitry configured to:
compare power being used by the plurality of processors and predicted power that is estimated to be used by the plurality of processors in the future;
generate one or more control signals to change operating power of the plurality of processors in response to the comparison; and
perform reinforcement learning to adapt the generation of the one or more control signals.

6. The processing system of claim 5 , wherein the reinforced learning uses actor critic-based machine learning or Q-learning machine learning.

7. The processing system of claim 5 , wherein the power management circuitry includes a Proportional-Integral-Derivative (PID) controller configured to receive a difference result of the comparison and generate the one or more signals to change operating frequency and/or voltage of the processing system.

8. The processing system of claim 7 , wherein the reinforcement learning modifies operating coefficients of the PID controller.

9. The processing system of claim 7 , wherein the PID controller generates the one or more signals every clock cycle and the reinforcement learning modifies operating coefficients of the PID controller at intervals that exceed a clock cycle.

10. The processing system of claim 5 , wherein:
each processor is configured to pre-decode instructions received by the respective processor and generate a signal, based on the pre-decoded instructions, estimating energy consumption level of pending instructions; and
the power management circuitry is further configured to aggregate the signals indicating energy consumption level from each processor and predict power based on the aggregated signals.

11. The processing system of claim 5 , wherein the power management circuitry is configured to adjust, based on the one or more generated control signals, the operating frequency and voltage of the processing system.

12. The processing system of claim 5 , wherein the power management circuitry is configured to, based on the one or more generated control signals, control one or more of the processors to delay execution of one or more pending instructions.

13. The processing system of claim 5 , wherein the power management circuitry includes an analog to digital converter (ADC) configured to receive input signals representing voltages and/or currents being supplied to the processing system, and generate, based on the input signals, a digital output signal representing the power being used by the processing system.

14. The processing system of claim 5 , wherein the plurality of processors and the power management circuitry are disposed on a same substrate.

15. A method for dynamically controlling voltage and frequency settings for a plurality of processors configured to receive and execute instructions, the method comprising:
measuring power currently used by the processors;
predicting power of the processors by examining instructions to be executed by the processors;
determine an error between the current power and the predicted power;
generate one or more signals to change operating frequency and/or voltage to reduce the error; and
perform reinforcement learning to adapt the generating of the one or more signals.

16. The method of claim 15 , wherein generating the one or more signals includes using a Proportional-Integral-Derivative (PID) controller to generate, based on the error, the one or more signals to change operating frequency and/or voltage supplied to one or more of the processors.

17. The method of claim 16 , wherein the PID controller generates the one or more signals at intervals corresponding to clock cycles, and the reinforcement learning modifies coefficients of the PID controller at intervals that exceed the intervals corresponding to clock cycles.

18. The method of claim 16 , wherein the reinforcement learning modifies coefficients of the PID controller.

19. The method of claim 15 further comprising:
generate a signal for each processor representing energy consumption level of pending instructions that will be executed at a clock cycle; and
determine the predicted power by aggregating the signals representing energy consumption level of pending instructions for the corresponding clock cycle.

20. A controller comprising:
a power monitor configured to monitor a voltage and/or current being supplied to a plurality of processors;
circuitry configured to receive, from the plurality of processors, signals representing estimated energy consumption for executing instructions in the future, and to predict, based on aggregation of the received signals, power that will be used by the processors in the future for executing said instructions; and
a self-learning and self-adjusting controller configured to control power supplied to the processors in response to the monitored voltage and/or current and the predicted power.

21. The controller of claim 20 , wherein the self-learning and self-adjusting controller includes:
a proportional-Integral-Derivative (PID) controller configured to determine power to be supplied to the processors based on coefficients, and
at least one neural network configured to perform reinforcement machine learning to modify the coefficients.

22. The controller of claim 20 , wherein the self-learning and self-adjusting controller is disposed on a same substrate as the processors.

23. The controller of claim 20 wherein the self-learning and self-adjusting controller is further configured to, based on the determined power to be supplied to the processors, send a signal to one or more of the processors to delay execution of at least one instruction.

24. The controller of claim 20 , wherein the self-learning and self-adjusting controller includes:
a proportional-Integral-Derivative (PID) controller configured to determine power to be supplied to the processors based on coefficients, and
at least one neural network configured to perform Actor-Critic reinforcement machine learning to modify the coefficients based on a difference between energy supplied to the plurality of processors and the estimated energy consumption for executing instructions in the future.

25. The controller of claim 20 , wherein the self-learning and self-adjust

Assignees

• Nvidia Corp

Inventors

• Idgunji Sachin
• Siu Ming Y
• Gu Alex
• Reilley James
• Patel Manan
• Selvanesan Rajeshwaran
• Kubalska Ewa

Classifications

• G06N3/092

  Reinforcement learning · CPC title

• G06F9/3836

  Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution · CPC title

• G06N3/08

  Learning methods · CPC title

• G06F9/382

  Pipelined decoding, e.g. using predecoding · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title