Display panel and manufacturing method thereof and display device

US11366364B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11366364-B2
Application numberUS-201716499722-A
CountryUS
Kind codeB2
Filing dateMay 12, 2017
Priority dateApr 5, 2017
Publication dateJun 21, 2022
Grant dateJun 21, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a substrate and a plurality of active switches disposed on the substrate. The active switch includes a gate layer disposed on a bottom portion. The gate layer is wound with an insulation medium layer, and the insulation medium layer includes a light-obstructing layer disposed on a side portion of the gate layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: a substrate; and a plurality of active switches disposed on the substrate, wherein each active switch of the plurality of active switches comprises a gate layer disposed at a bottom portion of the active switch, the gate layer is wound with an insulation medium layer, and the insulation medium layer comprises a first light-obstructing layer merely disposed on a first side portion of the gate layer and a second light-obstructing layer merely disposed on a second side portion of the gate layer; the first light-obstructing layer and the second light-obstructing layer are made of a non-metallic material, the first light-obstructing layer and the second light-obstructing layer are in contact and connected to the gate layer; a length of the first light-obstructing layer on the first side portion is less than a length of the second light-obstructing layer on the second side portion, a height of the first light-obstructing layer is less than the first side portion, and a height of the second light-obstructing layer is less than the second side portion; and the substrate is a first substrate, and the plurality of active switches and a color filter layer are disposed on the first substrate. 2. The display panel according to claim 1 , wherein an amorphous silicon layer is disposed on the insulation medium layer, an Ohmic contact layer is disposed on the amorphous silicon layer, a source layer and a drain layer of the plurality of active switches are separately disposed on two ends of the Ohmic contact layer, a trench is disposed between the source layer and the drain layer, the trench passes through the Ohmic contact layer, and a bottom portion of the trench is the amorphous silicon layer. 3. The display panel according to claim 2 , wherein boundaries of the insulation medium layer, the amorphous silicon layer, the Ohmic contact layer and the source layer on one side of the gate layer are flush with one another to form a first boundary, and the length of the first light-obstructing layer is equal to or exceeds a distance between the first boundary and the first side portion; and boundaries of the insulation medium layer, the amorphous silicon layer, the Ohmic contact layer and the drain layer on the other side of the gate layer are flush with one another to form a second boundary, and the of the second light-obstructing layer is equal to or exceeds a distance between the second boundary and the second side portion.

Assignees

Inventors

Classifications

  • comprising silicon, e.g. amorphous silicon or polysilicon · CPC title

  • having a particular composition, shape or crystalline structure of the active layer · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • of multiple TFTs · CPC title

  • Amorphous silicon · CPC title

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Frequently asked questions

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What does patent US11366364B2 cover?
A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a substrate and a plurality of active switches disposed on the substrate. The active switch includes a gate layer disposed on a bottom portion. The gate layer is wound with an insulation medium layer, and the insulation medium layer includes a light-obstructing layer disposed on a side …
Who is the assignee on this patent?
Hkc Corp Ltd, Chongqing Hkc Optoelectronics Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D30/6723. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 21 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).