Method for the production of a semi-transparent display, and a semi-transparent display

Patent metadata

Field	Value
Publication number	US-11362164-B2
Application number	US-201816768512-A
Country	US
Kind code	B2
Filing date	Dec 11, 2018
Priority date	Dec 12, 2017
Publication date	Jun 14, 2022
Grant date	Jun 14, 2022

Abstract

Provided is a semi-transparent display and a method for producing a semi-transparent display. An SOI wafer is provided, the surface having at least one pixel region and at least one contact region arranged next to the pixel region, the SOI wafer comprising a silicon substrate on the rear side. At least one electromagnetic-radiation-emitting layer is deposited on the front side of the SOI wafer. At least one transparent cover layer is applied above the at least one electromagnetic-radiation-emitting layer. A wiring carrier is fastened to the assembly comprising the SOI wafer, the electromagnetic-radiation-emitting layer and the transparent cover layer. Before fastening of the wiring carrier to the assembly, the silicon substrate is removed from the assembly, producing a residual assembly, and electrically conductive connections are formed between the contact region of the SOI wafer and the wiring carrier from the rear side of the SOI wafer.

First claim

The invention claimed is:

1. A method for the production of a semi-transparent display, comprising the following process steps:
providing an SOI wafer whose surface comprises a pixel region and a contact region arranged next to the pixel region, wherein the SOI wafer comprises a silicon substrate on the rear side of the SOI wafer;
depositing at least one electromagnetic radiation emitting layer on the front side of the SOI wafer;
applying at least one transparent cover layer above the at least one electromagnetic radiation emitting layer;
attaching a wiring carrier to the assembly comprising the at least the SOI wafer, the electromagnetic radiation emitting layer, and the transparent layer; and
leaving a plurality of subsections of the pixel region in which no circuit elements and no electrically conductive elements are situated, the subsections permitting light detectable with a human eye to pass from a front side of the semi-transparent display to a rear side of the semi-transparent display, the semi-transparent display comprising the wiring carrier, the at least the SOI wafer, the electromagnetic radiation emitting layer, and the transparent layer;
wherein prior to attaching the wiring carrier to the assembly comprising the SOI wafer, the electromagnetic radiation emitting layer, and the transparent cover layer, the silicon substrate is removed from the assembly, thus producing a residual assembly and electrically conductive connections are formed between the contact region of the SOI wafer and the wiring carrier from the rear side of the SOI wafer.

2. The method of claim 1 , wherein the wiring carrier is attached to the front side of the residual assembly.

3. The method of claim 2 , wherein electrically conductive connections between the contact region of the SOI wafer and the wiring carrier comprise a wire bond.

4. The method of claim 1 , wherein the wiring carrier is attached to the rear side of the residual assembly.

5. The method of claim 4 , wherein electrically conductive connections between the contact region of the SOI wafer and the wiring carrier include a bump bond or an anisotropically conducting bond.

6. The method of claim 1 , wherein the at least one electromagnetic radiation emitting layer is formed as an organic layer.

7. The method of claim 1 , wherein the at least one electromagnetic radiation emitting layer is formed as an inorganic layer.

8. The method of claim 1 , wherein the silicon substrate is mechanically abraded from the assembly and/or that the silicon substrate is chemically removed from the assembly.

9. The method of claim 1 , wherein at least one transparent cover layer is formed as glass or a polymer film.

10. The method of claim 1 , wherein pixel electrodes and pixel counter electrodes for the at least one electromagnetic radiation emitting layer are arranged on one level and designed as a component of the SOI wafer.

11. The method of claim 1 , wherein pixel electrodes are included in the SOI wafer, wherein one electrically conductive layer is deposited above and adjacent to the at least one electromagnetic radiation emitting layer, or as a top component of the electrically conductive layer.

12. The method of claim 11 , wherein the electrically conductive layer is structured.

Assignees

• Fraunhofer Ges Forschung

Inventors

• Richter Bernd
• Wartenberg Philipp
• Brenner Stephan
• Kirchhoff Volker
• Vogel Uwe

Classifications

• H10K59/82

  Interconnections, e.g. terminals (H10K59/131, H10K59/179 take precedence) · CPC title

• H10K71/00

  Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/0221

  comprising manufacture, treatment or patterning of TFT semiconductor bodies · CPC title