Semiconductor integrated circuit and operation method thereof
US-2015378351-A1 · Dec 31, 2015 · US
US11356085B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11356085-B2 |
| Application number | US-201816325515-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 27, 2018 |
| Priority date | Jan 9, 2018 |
| Publication date | Jun 7, 2022 |
| Grant date | Jun 7, 2022 |
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The PWM waveform generation device comprises a time-division multiplexing module, wherein the time-division multiplexing module is configured for receiving a first preprocessing signal and a second preprocessing signal output by two system clock sources, performing a first time-division processing on the first preprocessing signal to obtain a first time-division signal, and performing a second time-division processing on the second preprocessing signal to obtain a second time-division signal according to a preset strategy, performing multiplexing processing on the first time-division signal and the second time-division signal to obtain a PWM output signal, wherein an output frequency of the PWM output signal is a default standard clock frequency. The present invention has the advantages that the cycle length of one cycle of a PWM waveform depends on cycles of two preprocessing waveforms and the number of the cycles, such that the output waveform frequency may be calibrated to a desired frequency.
Opening claim text (preview).
What is claimed is: 1. A PWM waveform generation device, comprising: a time-division multiplexing module for receiving a first preprocessing signal and a second preprocessing signal, performing a first time-division processing on the first preprocessing signal to obtain a first time-division signal, and performing a second time-division processing on the second preprocessing signal to obtain a second time-division signal according to a preset strategy, performing multiplexing processing on the first time-division signal and the second time-division signal to obtain a PWM output signal, wherein an output frequency of the PWM output signal is a default standard clock frequency; the time-division multiplexing module performs the first time-division processing, the second time-division processing and the multiplexing processing by using the following formula: f = x * f 1 + y * f 2 x + y , wherein f represents a cycle length of a waveform corresponding to the PWM output signal; f 1 represents a cycle length of a waveform corresponding to the first time-division signal; f 2 represents a cycle length of a waveform corresponding to the second time-division signal; x represents a cycle number of a waveform corresponding to the first time-division signal; and y represents a cycle number of a waveform corresponding to the second time-division signal. 2. The PWM waveform generation device as claimed in claim 1 , wherein the time-division multiplexing module is configured to receive the first preprocessing signal output by a first system clock source, and the second preprocessing signal output by a second system clock source. 3. The PWM waveform generation device as claimed in claim 1 , wherein the preset strategy is to obtain the PWM output signal by adjusting the cycle length and the cycle number of the waveform corresponding to the first time-division signal, and the cycle length and the cycle number of the waveform corresponding to the second time-division signal, respectively. 4. A method for generation of a PWM waveform, comprising: a time-division multiplexing module receiving a first preprocessing signal and a second preprocessing signal output by two system clock sources, performing a first time-division processing on the first preprocessing signal to obtain a first time-division signal, and performing a second time-division processing on the second preprocessing signal to obtain a second time-division signal according to a preset strategy, performing multiplexing processing on the first time-division signal and the second time-division signal to obtain a PWM output signal, wherein an output frequency of the PWM output signal is a default standard clock frequency; wherein the time-division multiplexing module performs the first time-division processing, the second time-division processing and the multiplexing processing by using the following formula: f = x * f 1 + y * f 2 x + y , wherein f represents a cycle length of a waveform corresponding to the PWM output signal; f 1 represents a cycle length of a waveform corresponding to the first time-division signal; f 2 represents a cycle length of a waveform corresponding to the second time-division signal; x represents a cycle number of a waveform corresponding to the first time-division signal; and y represents a cycle number of a waveform corresponding to the second time-division signal. 5. The PWM waveform generation device as claimed in claim 4 , wherein the time-division multiplexing module is configured to receive the first preprocessing signal output by a first system clock source, and the second preprocessing signal output by a second system clock source. 6. The PWM waveform generation device as claimed in claim 4 , wherein the preset strategy is to obtain the PWM output signal by adjusting the cycle length and the cycle number of the waveform corresponding to the first time-division signal, and the cycle length and the cycle number of the waveform corresponding to the second time-division signal, respectively.
Duration or width modulation {; Duty cycle modulation} · CPC title
Frequency or rate modulation, i.e. PFM or PRM · CPC title
Distributors combined with modulators or demodulators {(pulse distributors in general H03K5/15; pulse counters H03K21/00 - H03K29/06; for telegraphy H04L5/22, H04L13/00 - H04L23/00, H04L25/45; for telephony H04Q11/04)} · CPC title
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