Reconfigurable graphene devices via electrical double layer gating

Patent metadata

Field	Value
Publication number	US-11348998-B1
Application number	US-202117222400-A
Country	US
Kind code	B1
Filing date	Apr 5, 2021
Priority date	Apr 5, 2021
Publication date	May 31, 2022
Grant date	May 31, 2022

Abstract

A method for using a graphene field-effect transistor (GFET) as a reconfigurable circuit, the method comprising the following steps: depositing a liquid dielectric over a graphene channel of the GFET; applying an activation energy via a first electric field across the liquid dielectric and the graphene channel to electrochemically produce chemical species within the liquid dielectric such that the chemical species accumulate at, and molecularly bond with, the graphene channel thereby decreasing a conductivity of the graphene channel; and applying a deactivation energy via a second electric field of opposite polarity to the first electric field to remove interaction between the chemical species and the graphene channel to increase the conductivity of the graphene channel.

First claim

We claim:

1. A method for using a graphene field-effect transistor (GFET) as a reconfigurable circuit, the method comprising the following steps:
depositing a liquid dielectric over a graphene channel of the GFET;
applying an activation energy via a first electric field across the liquid dielectric and the graphene channel to electrochemically produce chemical species within the liquid dielectric such that the chemical species accumulate at, and molecularly bond with, the graphene channel thereby decreasing a conductivity of the graphene channel; and
applying a deactivation energy via a second electric field of opposite polarity to the first electric field to remove interaction between the chemical species and the graphene channel to increase the conductivity of the graphene channel.

2. The method of claim 1 , wherein the conductivity of the graphene channel is altered without performing electron/hole doping of the graphene channel.

3. The method of claim 2 , wherein the step of applying an activation energy further comprises:
applying a voltage bias for a period of time until an electrical double layer (EDL) at a graphene-dielectric interface is strong enough to separate the chemical species based on their polarity and to provide the activation energy to produce weak molecular bonds between the chemical species and the graphene channel.

4. The method of claim 2 , wherein the step of applying an activation energy further comprises: altering a pH of the liquid dielectric.

5. The method of claim 3 , further comprising the step of altering a quantity of the molecular bonds by adjusting a voltage and polarization of the voltage bias to dynamically set a degree of electrical conductivity of the graphene channel such that the GFET exhibits ON-OFF ratios larger than 10 4 with OFF-resistances as high as 10 MΩ thereby enabling reversible programming of the electrical conductance of the graphene channel.

6. The method of claim 5 , further comprising altering the voltage bias and the time period to change carrier mobility and transconductance thereby enabling the reconfigurable graphene circuit to be used as a tunable analog circuit.

7. The method of claim 5 , wherein the chemical species comprise hydrogen molecules that accumulate on, and molecularly bond to, the graphene channel such that portions of the graphene channel are molecularly altered to graphane.

8. A method for providing a reconfigurable graphene circuit, the method comprising the following steps:
depositing a liquid dielectric over a graphene channel of a graphene field-effect transistor (GFET);
applying a voltage bias across the liquid dielectric and the graphene channel that is sufficient to electrochemically produce ions within the liquid dielectric;
continuing to apply the voltage bias for a period of time until an electrical double layer (EDL) at a graphene-dielectric interface is strong enough to separate the electrochemically-produced ions based on their polarity and to provide necessary molecular activation and deactivation energies to form weak, reversible molecular bonds between the produced ions and the graphene channel; and
using the reversible molecular bonds to dynamically set a degree of electrical conductance of the graphene channel such that the GFET exhibits ON-OFF ratios larger than 10 4 with OFF-resistances as high as 10 MΩ thereby enabling reversible programming of the electrical conductance of the graphene channel.

9. The method of claim 8 , wherein a gate electrode is deposited on the liquid dielectric and wherein a surface area of the gate electrode is at least as large as 75% of a surface area of the graphene channel such that when the controlled voltage bias is applied to the gate electrode electrochemical reactions are induced within the dielectric layer and portions of the graphene channel changing a majority of the graphene into a chemically-bonded material and forming a uniform electrical double layer at a graphene-dielectric interface.

10. The method of claim 8 , wherein the reconfigurable graphene circuit is nonvolatile memory that maintains fixed electrical transport (conductivity, transconductance, carrier mobility) properties after biasing.

11. The method of claim 10 , further comprising resetting the nonvolatile memory with the voltage bias by changing the degree of conductance of the graphene channel.

12. The method of claim 10 , further comprising altering the voltage bias or the period of time or both to set the graphene channel to an intermediate conductance state that is between a fully conductive and an insulative state thereby enabling a nonvolatile, intermediate memory state without changing a chemical composition of the EDL.

13. The method of claim 12 , wherein the nonvolatile, intermediate memory state is characterized by a 50% conductance of the graphene channel.

14. The method of claim 13 , wherein the liquid dielectric is selected from the group consisting of: a polar organic compound, glycerin, and honey.

15. The method of claim 8 , wherein the graphene channel has a width that is shorter than 100 micrometers and a length that is shorter than 100 micrometers.

16. The method of claim 8 , wherein the reconfigurable graphene circuit is an electrical switch.

17. The method of claim 8 , further comprising a RESET step that comprises applying a voltage bias of opposite polarity to the voltage bias that triggered production of the electrochemically-produced ions such that weakly-bound ions on the graphene channel are released or electrochemically changed and redistributed in the dielectric liquid.

18. A reconfigurable graphene field-effect transistor (GFET) comprising:
a graphene channel disposed between source and drain electrodes;
a liquid dielectric disposed on top of the graphene channel; and
a gate electrode disposed on the liquid dielectric, wherein a surface area of the gate electrode is at least as large as 75% of the surface area of the graphene channel such that when a controlled voltage bias is applied to the gate electrode electrochemical reactions are induced within the liquid dielectric and portions of the graphene channel changing a majority of the graphene into an ion-bonded material and forming a uniform electrical double layer at a graphene-dielectric interface.

19. The reconfigurable GFET of claim 18 , wherein the liquid dielectric has a dielectric constant greater than or equal to 30.

20. The reconfigurable GFET of claim 19 , wherein the graphene channel has a width that is shorter than 50 nanometers.

Assignees

• United States Of America As Respresented By The Secretary Of The Navy
• Us Navy

Inventors

• Hayashi Cody K
• Ordonez Richard C
• Garmire David G
• Hsu Lewis

Classifications

• H01G7/06

  having a dielectric selected for the variation of its permittivity with applied voltage, i.e. ferroelectric capacitors (electrets H01G7/02) · CPC title

• H01G4/04

  Liquid dielectrics · CPC title

• H10D62/882

  Graphene · CPC title

• H10D30/47

  having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT] · CPC title

• H10D48/362

  Unipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions, e.g. hot electron transistors [HET], metal base transistors [MBT], resonant tunnelling transistors [RTT], bulk barrier transistors [BBT], planar doped barrier transistors [PDBT] or charge injection transistors [CHINT] · CPC title