Solid-state image capturing device, method of driving solid-state image capturing device, and electronic apparatus

Patent metadata

Field	Value
Publication number	US-11336860-B2
Application number	US-201917270200-A
Country	US
Kind code	B2
Filing date	Aug 16, 2019
Priority date	Aug 31, 2018
Publication date	May 17, 2022
Grant date	May 17, 2022

Abstract

An AD conversion circuit with reduced comparator noise is disclosed. In one example, a solid-state image capturing device includes at least three stacked substrates, in which for each pixel block, a first substrate includes a photoelectric conversion unit that generates electric charges according to incident light, a transfer transistor, and a floating diffusion, a second substrate includes one comparator that compares a signal according to a voltage of the floating diffusion with a reference signal, a third substrate includes a code generation circuit that generates a code of a counter, a storage unit that stores the code, and a timing control circuit that controls a timing of storing the code in the storage unit, and the solid-state image capturing device further includes a pixel array in which a plurality of the pixel blocks is arranged.

First claim

The invention claimed is:

1. A solid-state image capturing device including a pixel array in which a plurality of pixel blocks are arranged, each of the pixel blocks including a plurality of pixels, the solid-state image capturing device comprising:
a first substrate, a second substrate and a third substrate that are stacked, wherein
for each of the pixel blocks:
the first substrate includes, for each of the pixels, a photoelectric converter that generates electric charges according to incident light, a transfer transistor, and a floating diffusion, the floating diffusion and a gate electrode of the transfer transistor being arranged at a center of the pixel and the photoelectric converter in a plan view,
the second substrate includes a comparator that compares a signal according to a voltage of the floating diffusion with a reference signal,
the plurality of pixels shares the comparator, and
the third substrate includes a code generation circuit that generates a code of a counter, a memory that stores the code, and a timing control circuit that controls a timing of storing the code in the memory.

2. The solid-state image capturing device according to claim 1 , wherein the code generation circuit is
shared by all the pixel blocks,
arranged for one or a plurality of the pixel blocks, or
arranged for one or more rows or one or more columns of the pixel blocks.

3. The solid-state image capturing device according to claim 1 , further comprising
a light-shielding film between the first substrate and the second substrate.

4. The solid-state image capturing device according to claim 1 , further comprising
an air gap around a connecting portion that connects a circuit arranged on the first substrate and a circuit arranged on the second substrate.

5. The solid-state image capturing device according to claim 1 , wherein
the first substrate further includes a reset transistor, an amplification transistor, and a select transistor for each of the pixels.

6. The solid-state image capturing device according to claim 1 , wherein
the first substrate further includes a reset transistor and an amplification transistor that are shared by the plurality of pixels included in the pixel block.

7. An electronic apparatus comprising a solid-state image capturing device according to claim 1 .

8. A solid-state image capturing device including a pixel array in which a plurality of pixel blocks are arranged, each of the pixel blocks including a plurality of pixels, the solid-state image capturing device comprising:
a first substrate, a second substrate and a third substrate that are stacked, wherein
for each of the pixel blocks:
the first substrate includes, for each of the pixels, a photoelectric converter that generates electric charges according to incident light, a transfer transistor, and a floating diffusion, a gate electrode of the transfer transistor is a ring-shaped gate electrode that surrounds an entire circumference of the floating diffusion,
the second substrate includes a comparator that compares a signal according to a voltage of the floating diffusion with a reference signal,
the plurality of pixels shares the comparator, and
the third substrate includes a code generation circuit that generates a code of a counter, a memory that stores the code, and a timing control circuit that controls a timing of storing the code in the memory.

9. An electronic apparatus comprising a solid-state image capturing device according to claim 8 .

10. A solid-state image capturing device including a pixel array in which a plurality of pixel blocks are arranged, each of the pixel blocks including a plurality of pixels, the solid-state image capturing device comprising:
a first substrate, a second substrate and a third substrate that are stacked, wherein
for each of the pixel blocks:
the first substrate includes, for each of the pixels, a photoelectric converter that generates electric charges according to incident light, a transfer transistor, and a floating diffusion,
the second substrate includes a comparator that compares a signal according to a voltage of the floating diffusion with a reference signal,
the plurality of pixels shares the comparator, and
the third substrate includes a code generation circuit that generates a code of a counter, a memory that stores the code, and a timing control circuit that controls a timing of storing the code in the memory, and
wherein the pixel block further includes a reset transistor, an amplification transistor, and a select transistor for each of the pixels in the second substrate.

11. An electronic apparatus comprising a solid-state image capturing device according to claim 10 .

12. A solid-state image capturing device including a pixel array in which a plurality of pixel blocks are arranged, each of the pixel blocks including a plurality of pixels, the solid-state image capturing device comprising:
a first substrate, a second substrate and a third substrate that are stacked, wherein
for each of the pixel blocks:
the first substrate includes, for each of the pixels, a photoelectric converter that generates electric charges according to incident light, a transfer transistor, and a floating diffusion,
the second substrate includes a comparator that compares a signal according to a voltage of the floating diffusion with a reference signal,
the plurality of pixels shares the comparator, and
the third substrate includes a code generation circuit that generates a code of a counter, a memory that stores the code, and a timing control circuit that controls a timing of storing the code in the memory, and wherein
the pixel block further includes one reset transistor and one amplification transistor in the second substrate, and
the plurality of pixels shares the reset transistor and the amplification transistor.

13. The solid-state image capturing device according to claim 12 , wherein
the pixel block is configured such that a wire connected to each of a plurality of the floating diffusions is connected to the second substrate for each of the floating diffusions, and is connected to one common wire in the second substrate.

14. The solid-state image capturing device according to claim 12 , wherein
the pixel block is configured such that a wire connected to each of a plurality of the floating diffusions is connected to one common wire in the first substrate, and
the common wire is connected to the second substrate.

15. An electronic apparatus comprising a solid-state image capturing device according to claim 12 .

16. A solid-state image capturing device including a pixel array in which a plurality of pixel blocks are arranged, each of the pixel blocks including a plurality of pixels, the solid-state image capturing device comprising:
a first substrate, a second substrate and a third substrate that are stacked, wherein
for each of the pixel blocks:
the first substrate includes, for each of the pixels, a photoelectric converter that generates electric charges according to incident light, a transfer transistor, and a floating diffusion,
the second substrate includes a comparator that compares a signal according to a voltage of the floating diffusion with a reference signal,
the plurality of pixels shares the comparator, and
the third substrate includes a code generation circuit that generates a code of a counter, a memory that stores the code, and a timing control circuit that controls a timing of storing the code in the memory, and wherein
the pixel block is configured such that a wire connected to each of a plurality of the floating diffus

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Yonemoto Kazuya

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W90/792

  between multiple chips · CPC title

• H04N25/79 Primary

  Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors · CPC title

• H04N25/778

  comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title