Apparatus for compensating parasitic impedance for integrated circuits

Patent metadata

Field	Value
Publication number	US-11336076-B2
Application number	US-202016743856-A
Country	US
Kind code	B2
Filing date	Jan 15, 2020
Priority date	Jan 16, 2019
Publication date	May 17, 2022
Grant date	May 17, 2022

Abstract

A laser diode driver circuit includes a first pair of contacts and connectors coupled to an anode of the laser diode. An inductance of each of the first pair of contacts and connectors is the same. A second pair of contacts and connectors are coupled to a cathode of the laser diode. An inductance of each of the second pair of contacts and connectors is the same. The laser diode driver circuit also includes current driving circuitry.

First claim

The invention claimed is:

1. A laser diode driver circuit comprising:
a first pair of connection paths each coupled to an anode of a laser diode, the first pair of connection paths including a first connection path and a second connection path, a first inductance of the first connection path being substantially equal to a second inductance of the second connection path;
a second pair of connection paths each coupled to a cathode of the laser diode, the second pair of connection paths including a third connection path and a fourth connection path, a third inductance of the third connection path being substantially equal to a fourth inductance of the fourth connection path; and
current driving circuitry, configured to operate such that:
in a first phase, a first current passes through the first pair of connection paths, and a second current passes through the second pair of connection paths, and a potential difference between the cathode and the anode is below a diode activation value;
in a second phase subsequent to the first phase, the second current passes through the first connection path of the first pair of connection paths, the laser diode, and the third connection path of the second pair of connection paths, and the potential difference between the cathode and the anode is above the diode activation value; and
in a third phase subsequent to the second phase, a third current passes through the first connection path of the first pair of connection paths, the laser diode, and the third connection path of the second pair of connection paths, and the potential difference between the cathode and the anode is below the diode activation value.

2. The laser diode driver circuit as claimed in claim 1 , wherein the current driving circuitry further includes:
a first switch configured to selectively couple the first connection path of the first pair of connection paths to a high potential supply node,
wherein in the first, second and third phase, the first switch is configured to couple the first connection path of the first pair of connection paths to the high potential supply node.

3. The laser diode driver circuit as claimed in claim 2 , wherein the first switch includes a pMOS transistor controlled by a safety control signal.

4. The laser diode driver circuit as claimed claim 2 , wherein the current driving circuitry further includes:
a first diode with an anode coupled to the second connection path of the first pair of connection paths and a cathode coupled to the high potential supply node;
a current source node for providing the first current; and
a second switch configured to selectively couple the second connection path of the first pair of connection paths to a low potential supply node via the current source;
wherein in operation:
in the first phase, the second switch is configured to couple the second connection path of the first pair of connection paths to the low potential supply node via the current source so that the first current passes through the first pair of connection paths;
in the second phase, the second switch is configured to uncouple the second connection path of the first pair of connection paths to the low potential supply node via the current source so that the first current passes through the first pair of connection paths, and the diode is configured to provide a shunt current path to shunt current from the second inductance of the second connection path of the first pair of connection paths; and
in the third phase, the second switch is configured to uncouple the second connection path of the first pair of connection paths and to provide, in combination with the first diode, a high impedance node.

5. The laser diode driver circuit as claimed in claim 4 , wherein the second switch includes an nMOS transistor controlled by an anode control signal.

6. The laser diode driver circuit as claimed in claim 2 , wherein the current driving circuitry further includes:
a third switch configured to selectively couple the fourth connection path of the second pair of connection paths to a high potential supply node; and
a second diode with a cathode coupled to the fourth connection path of the second pair of connection paths and an anode coupled to a low potential supply node;
wherein in operation:
in the first phase, the third switch is configured to couple the fourth connection path of the second pair of connection paths to the high potential supply node;
in the second phase, the third switch is configured to uncouple the fourth connection path of the second pair of connection paths from the high potential supply node such that the second diode is configured to provide a shunt current path to shunt current from the fourth inductance of the fourth connection path of the second pair of connection paths; and
in the third phase, the third switch is configured to uncouple the fourth connection path of the second pair of connection paths, and to provide, in combination with the second diode, a high impedance node.

7. The laser diode driver circuit as claimed in claim 6 , wherein the third switch includes a pMOS transistor controlled by a cathode control signal.

8. The laser diode driver circuit as claimed in claim 6 , wherein the current driving circuitry further includes:
a current source node for providing the second current and selectively coupling the third connection path of the second pair of connection path to the low potential supply node; and
a fourth switch configured to selectively couple the fourth connection path of the second pair of connection paths to the high potential supply node, wherein in operation:
in the first phase, the current source node is configured to couple the third connection path of the second pair of connection paths to the low potential supply node such that the second current passes through the second pair of connection paths;
in the second phase, the current source node is configured to couple the third connection path of the second pair of connection paths to the low potential supply node such that the second current passes through the first connection path of the first pair of connection paths, the laser diode, and the third connection path of the second pair of connection path; and
in the third phase, the fourth switch is configured to selectively couple the third connection path of the second pair of connection paths to the high potential supply node and to provide a snub current path to snub current from the third inductance of the third connection path of the second pair of connection paths.

9. The laser diode driver circuit as claimed in claim 8 , wherein the third switch includes a pMOS transistor controlled by a second cathode control signal.

10. The laser diode driver circuit as claimed in claim 1 , further comprising:
timing generating circuitry configured to generate four phase-shifted clock signals;
a combinational logic configured to receive the four phase-shifted clock signals and to generate phase-defining signals for defining a start of the first phase, a start of the second phase and a start of the third phase, respectively, wherein the phase-defining signals are generated based on one of: rising edges from the four phase-shifted clock signals and falling edges from the four phase-shifted clock signals; and
a level shifter for receiving the phase-defining signals and for outputting signals for controlling the current driving circuitry in order to operate in the first phase, the second phase and the third phase.

11. The laser diode driver circuit as claimed in claim 10 , wherein the timing generating circuitry is configured to generate:
a first clock signal;
a second clock signal, which is a first p

Assignees

• St Microelectronics Res & Dev Ltd
• St Microelectronics Grenoble 2

Inventors

• Lee Denise
• Dutton Neale
• Moeneclaey Nicolas
• Andriot-Ballet Jerome

Classifications

• H01S5/042

  Electrical excitation {; Circuits therefor (monolithically integrated laser drive components H01S5/0261)} · CPC title

• H01S5/0261 Primary

  Non-optical elements, e.g. laser driver components, heaters (H01S5/0265 takes precedence) · CPC title

• H01S5/183

  having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] · CPC title

• H01S5/0428 Primary

  for applying pulses to the laser · CPC title

• H01S5/06226

  Modulation at ultra-high frequencies · CPC title