Display panel and display device

US11335284B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11335284-B2
Application numberUS-202016991239-A
CountryUS
Kind codeB2
Filing dateAug 12, 2020
Priority dateJun 30, 2020
Publication dateMay 17, 2022
Grant dateMay 17, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Display panel and display device are provided. The display panel includes a first display area and a second display area adjacent to the first display area. The second display area is multiplexed as a photosensitive element setting area. The first display area includes a plurality of first pixels arranged in an array. The second display area includes a plurality of second pixels arranged in an array. A first pixel of the plurality of first pixels includes a plurality of first sub-pixels. A second pixel of the plurality of second pixels includes a first area and a second area. The first area includes a plurality of second sub-pixels. The second area is in an open state when a photosensitive element is in operation. The second area is in a closed state when the display panel is in a full screen display.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: a first display area and a second display area adjacent to the first display area, the second display area being multiplexed as a photosensitive element setting area, the first display area including a plurality of first pixels arranged in an array, and the second display area including a plurality of second pixels arranged in an array, wherein: a first pixel of the plurality of first pixels includes a plurality of first sub-pixels, a second pixel of the plurality of second pixels includes a first area and a second area, the first area includes a plurality of second sub-pixels, an area of a first sub-pixel of the plurality of first sub-pixels is less than an area of a second sub-pixel of the plurality of second sub-pixels, and an area of the first area is less than or equal to an area of the second area, the second area is in an open state when a photosensitive element is in operation, and external light enters the photosensitive element through the second area, and the second area is in a closed state when the display panel is in a full screen display, and the plurality of second sub-pixels are configured to realize a normal display of the second display area. 2. The display panel according to claim 1 , wherein: the plurality of second sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels, the second area includes a plurality of first sub-areas corresponding to the plurality of second sub-pixels in a one-to-one correspondence; along a first direction, the red sub-pixels, the green sub-pixels, and the blue sub-pixels are repeatedly arranged in sequence; and along a second direction interacting the first direction, the plurality of second sub-pixels and the plurality of first sub-areas are alternately arranged. 3. The display panel according to claim 1 , wherein: the plurality of second sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels, the second area includes a plurality of second sub-areas corresponding to the plurality of second sub-pixels in a one-to-one correspondence; along a first direction, the red sub-pixels, the green sub-pixels, and the blue sub-pixels are repeatedly arranged, and the plurality of second sub-pixels and the plurality of second sub-areas are arranged at intervals in sequence; and along a second direction interacting the first direction, light outputted from the plurality of second sub-pixels have a same color. 4. The display panel according to claim 1 , wherein: the plurality of second sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels; along a first direction, the red sub-pixels, the green sub-pixels, and the blue sub-pixels are arranged repeatedly in sequence, red sub-pixels, green sub-pixels, and blue sub-pixels in a same second pixel form a sub-pixel unit, and the sub-pixel unit and the second area are alternately arranged; and along a second direction interacting the first direction, light outputted from the plurality of second sub-pixels have a same color. 5. The display panel according to claim 1 , wherein: the plurality of second sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels; and in two adjacently arranged second pixels, positions of the first areas in the two adjacently arranged second pixels are different. 6. The display panel according to claim 1 , wherein the second area includes white sub-pixels. 7. The display panel according to claim 1 , wherein the plurality of first sub-pixels in the first pixel and plurality of second sub-pixels in the second pixel synchronously display a screen. 8. The display panel according to claim 1 , wherein: the second area includes pixel electrodes; and the second display area further includes a conductive metal layer, the conductive metal layer is electrically connected to all of the pixel electrodes of the second area, and is configured to control the second area to be in the open state when the photosensitive element is in operation, and to control the second area to be in the closed state when the display panel is in the full screen display. 9. The display panel according to claim 1 , wherein: the first pixel includes a first sub-pixel circuit corresponding to the plurality of first sub-pixels, and the first sub-pixel circuit is configured to control the plurality of first sub-pixels to emit light; the second pixel includes a second sub-pixel circuit corresponding to the plurality of second sub-pixels, and the second sub-pixel circuit is configured to control the plurality of second sub-pixels to emit light; and the second pixel further includes a third sub-pixel circuit corresponding to the second area, and the third sub-pixel circuit is configured to control a light transmission of the second area according to a light output brightness of the plurality of second sub-pixels. 10. The display panel according to claim 9 , wherein: in two adjacent second pixels, second sub-pixel circuits of the two adjacent second sub-pixels are arranged adjacently and aligned along a third direction, or a second sub-pixel circuit of the adjacent second sub-pixels and a third sub-pixel circuit of the second area are arranged adjacently and aligned along the third direction, wherein the third direction is parallel to a column direction or a row direction of the array of the plurality of second pixels; and the display panel further includes light-shielding layers, a projection of a light-shielding layer on a plane where the display panel is located completely covers the second sub-pixel circuit and the third sub-pixel circuit. 11. The display panel according to claim 10 , wherein the second sub-pixel circuit and the third sub-pixel circuit both include thin film transistors, and a distance between active layers of the thin film transistors in two adjacent sub-pixel circuits is 2 μm to 3 μm. 12. The display panel according to claim 9 , wherein: in two adjacent second pixels, second sub-pixel circuits of the two adjacent second sub-pixels are arranged adjacently and misaligned along a third direction, or a second sub-pixel circuit of the adjacent second sub-pixels and a third sub-pixel circuit of the second area are arranged adjacently and misaligned along the third direction, wherein the third direction is parallel to a column direction or a row direction of the array of the plurality of second pixels; and the display panel further includes light-shielding layers, a projection of a light-shielding layer on a plane where the display panel is located completely covers the second sub-pixel circuit and the third sub-pixel circuit. 13. The display panel according to claim 12 , wherein the second sub-pixel circuit and the third sub-pixel circuit both include thin film transistors, and a distance between active layers of the thin film transistors in two adjacent sub-pixel circuits is 1.5 μm to 2.5 μm. 14. The display panel according to claim 10 , wherein a distance between an edge of the light-shielding layer and an edge of a corresponding sub-pixel circuit is less than or equal to 2 μm. 15. The display panel according to claim 2 , wherein a length of the second area in the first direction changes non-periodically, and/or the length of the second area in the second direction changes non-periodically. 16. The display panel according to claim 1 , wherein an area ratio of the second area to the first area is greater than or equal to 2, and less than or equal to 4. 17. The display panel according to claim 1 , wherein an area of the second sub-pixel is a same as an area

Assignees

Inventors

Classifications

  • characterised by their geometrical arrangement · CPC title

  • G09G3/3607Primary

    for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels (display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127) · CPC title

  • using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

  • suitable for active matrices only · CPC title

  • Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements · CPC title

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What does patent US11335284B2 cover?
Display panel and display device are provided. The display panel includes a first display area and a second display area adjacent to the first display area. The second display area is multiplexed as a photosensitive element setting area. The first display area includes a plurality of first pixels arranged in an array. The second display area includes a plurality of second pixels arranged in an …
Who is the assignee on this patent?
Xiamen Tianma Micro Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/134309. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 17 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).