Logic circuitry

Patent metadata

Field	Value
Publication number	US-11331925-B2
Application number	US-201916965825-A
Country	US
Kind code	B2
Filing date	Apr 5, 2019
Priority date	Dec 3, 2018
Publication date	May 17, 2022
Grant date	May 17, 2022

Abstract

A sensor circuit for a replaceable print apparatus component comprises an interface to transmit signals with respect to a print apparatus logic circuit, and further comprises, connected to the interface, at least two sensor cell arrays, each array including nominally the same cells, the cells of one array being nominally different than the cells of the other array, and at least one single cell sensor that is nominally different than the other cells.

First claim

What is claimed is:

1. A sensor circuit, comprising:
an interface to transmit signals with respect to a logic circuit;
at least two sensor cell arrays connected to the interface, cells within respective ones of the cell arrays being substantially a same type of cell, and cells of one array being different than the cells of the other array;
at least one single cell sensor that is different than the other cells; and
calibration logic to condition output signal transmission based on calibration parameters received through the interface, wherein the calibration logic includes at least one of an offset circuit or an amplifier gain setting circuit.

2. The sensor circuit of claim 1 , further including a third cell array to stimulate one of the sensor cell arrays.

3. The sensor circuit of claim 1 , further including at least four different cell classes of different sensor cells.

4. The sensor circuit of claim 1 , having a length that is at least ten times greater than at least one of a width or a thickness wherein each cell of each array is provided at a different location along the length.

5. The sensor circuit of claim 1 , wherein one of the at least two sensor cell arrays includes a plurality of sensor cells that are to detect a pneumatic stimulus or pressurization applied to a replaceable print component, wherein the pneumatic stimulus is associated with air pressure being applied to the replaceable print component by a print apparatus.

6. The sensor circuit of claim 5 , wherein at least one of the sensor cells is to detect at least one of a deformation of a reservoir wall or a pressure in a liquid reservoir.

7. The sensor circuit of claim 1 , wherein at least one of the sensor cells includes a strain sensing component including at least one of a strain sensing resistor or a strain gauge.

8. The sensor circuit of claim 1 , further including:
a plurality of sensor cells to sense an absence or a presence of liquid at the respective sensor cell.

9. The sensor circuit of claim 8 , wherein the sensor cell array includes a temperature sensor cell array and calibration logic includes heater, wherein upon activation of the heater, a different output of the temperature sensor cell array can be associated with being covered or not being covered by print liquid.

10. The sensor circuit of claim 9 , wherein the temperature sensor cell and heater each include a different resistor.

11. The sensor circuit of claim 1 , further including at least one single cell sensor physically different than the sensor cell arrays, the at least one single cell sensor including a resistor, wherein cells of a second sensor cell array include serpentine-shaped resistors.

12. The sensor circuit of claim 11 , wherein the resistor includes a wire that is part of thin film circuitry, and the resistor is to detect a crack in the thin film circuitry.

13. The sensor circuit of claim 1 , wherein the at least one single cell sensor includes a diode, wherein the diode is to return a signal that corresponds to an absolute temperature characteristic of the sensor circuit.

14. A sensor circuit comprising:
an interface to transmit signals with respect to a logic circuit;
at least two sensor cell arrays connected to the interface, cells within respective ones of the cell arrays being substantially a same type of cell, and cells of one array being different than the cells of the other array;
at least one single cell sensor that is different than the other cells; and
calibration logic to condition output signal transmission based on calibration parameters received through the interface, wherein the calibration logic is to change a transmitted signal based on an offset parameter by an amount that is a function of an amplifier parameter.

15. A sensor circuit, comprising:
an interface to transmit signals with respect to a logic circuit;
at least two sensor cell arrays connected to the interface, cells within respective ones of the cell arrays being substantially a same type of cell, and cells of one array being different than the cells of the other array; and
at least one single cell sensor that is different than the other cells,
wherein the sensor circuit is to select:
sensor cell arrays based on received class parameters, and
cells of selected sensor cell arrays based on received sub-class parameters.

16. The sensor circuit of claim 5 , further including calibration logic to condition output signal transmission based on calibration parameters received through the interface.

17. The sensor circuit of claim 15 , wherein different sensor cell arrays have a same amount of cells that are selectable by the same sub-class parameters.

18. The sensor circuit of claim 15 , wherein different sensor cell arrays are selectable by different class parameters.

19. The sensor circuit of claim 15 , further including at least four different cell classes selectable by the class parameters.

20. The sensor circuit of claim 10 , further including multiplex logic to select at least one of any of the cell classes or cells based on at least one of the received class parameters or the received sub-class parameters, respectively.

21. A sensor circuit comprising:
an interface to transmit signals with respect to a logic circuit;
at least two sensor cell arrays connected to the interface, cells within respective ones of the cell arrays being substantially a same type of cell, and cells of one array being different than the cells of the other array;
at least one single cell sensor that is different than the other cells; and
multiplex logic to select any of the cells.

22. A sensor circuit comprising:
an interface to transmit signals with respect to a logic circuit;
at least two sensor cell arrays connected to the interface, cells within respective ones of the cell arrays being substantially a same type of cell, and cells of one array being different than the cells of the other array;
at least one single cell sensor that is different than the other cells; and
common calibration logic to calibrate a plurality of cell classes, wherein the calibration logic includes at least one of an offset circuit or an amplifier gain setting circuit wherein each circuit is to calibrate at least two sensor cell arrays.

Assignees

• Hewlett Packard Development Co

Inventors

• Gardner James Michael
• Linn Scott A
• Ward Jefferson P
• Olsen David N
• Studer Anthony D
• Cumbie Michael W
• Lu Sirena Chi

Classifications

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• H04L9/0819

  Key transport or distribution, i.e. key establishment techniques where one party creates or otherwise obtains a secret value, and securely transfers it to the other(s) (network architectures or network communication protocols for key distribution in a packet data network H04L63/062) · CPC title

• B41J2202/20

  Modules · CPC title

• G06F9/30105

  Register structure · CPC title

• G06F21/62

  Protecting access to data via a platform, e.g. using keys or access control rules · CPC title