Display device

Patent metadata

Field	Value
Publication number	US-11328659-B2
Application number	US-202117238216-A
Country	US
Kind code	B2
Filing date	Apr 23, 2021
Priority date	May 15, 2020
Publication date	May 10, 2022
Grant date	May 10, 2022

Abstract

A display device comprises a plurality of pixels arranged in a first direction and a second direction intersecting the first direction, a plurality of sub-pixels included in each of the plurality of pixels, a first LED chip included in one of the plurality of sub-pixels and emitting light at a first luminosity L1, a second LED chip included in the one of sub-pixel and emitting light at a second luminosity L2, a first wiring supplying a first voltage corresponding to the first luminosity L1 to the first LED chip, a second wiring supplying a second voltage corresponding to the second luminosity L2 to the second LED chip. The first luminous intensity L1 of the first LED chip is calculated based on an equation (1) using a chip area S1 and a luminance EQEL1 of the first LED chip,L1=S1×EQEL1  (1).

First claim

What is claimed is:

1. A display device comprising:
a plurality of pixels arranged in a first direction and a second direction intersecting the first direction;
a plurality of sub-pixels included in each of the plurality of pixels;
a first LED chip included in one of the plurality of sub-pixels and emitting light at a first luminous intensity L 1 ;
a second LED chip included in the one of sub-pixel and emitting light at a second luminous intensity L 2 ;
a first wiring supplying a first voltage corresponding to the first luminous intensity L 1 to the first LED chip; and
a second wiring supplying a second voltage corresponding to the second luminous intensity L 2 to the second LED chip,
wherein
the first luminous intensity L 1 of the first LED chip is calculated based on an equation (1) using a chip area S 1 and a luminance EQEL 1 of the first LED chip,
L 1= S 1 ×EQEL 1  (1),

the second luminous intensity L 2 of the second LED chip is calculated based on an equation (2) using a chip area S 2 and a luminance EQEL 2 of the second LED chip,
L 2= S 2 ×EQEL 2  (2),

the luminance EQEL 1 is the luminance of the first LED chip when the first LED chip emits light at a current density maximizing an external quantum efficiency,
the luminance EQEL 2 is the luminance of the second LED chip when the second LED chip emits light at a current density maximizing an external quantum efficiency,
the chip area S 1 is a factorial of 2 of the chip area S 2 , and
the first voltage is different from the second voltage.

2. The display device according to claim 1 , wherein
the chip area S 1 is larger than the chip area S 2 , and the first voltage is larger than the second voltage.

3. The display device according to claim 1 , wherein
a light emission color of the first LED chip is same as that of the second LED chip emit light.

4. The display device according to claim 1 , wherein
a frame period in which the plurality of pixels emit light or does not emit light includes a first subframe period and a second subframe period,
during the frame period, a light emission or a non-light emission of the first LED chip and a light emission or a non-light emission of the second LED chip are controlled by a first control signal.

5. The display device according to claim 4 , wherein
a time during which the first LED chip is emitting light or a time during which the first LED chip is not emitting light is controlled by a second control signal,
the time during which the first LED chip is emitting light or the time during which the first LED chip is not emitting light differs between the first subframe period and the second subframe period,
a time during which the second LED chip is emitting light or a time during which the second LED chip is not emitting light is controlled by a third control signal, and
the time during which the second LED chip is emitting light or the time during which the second LED chip differs between the first subframe period and the second subframe period.

6. The display device according to claim 5 , wherein
each of the first LED chip and the second LED chip has a first electrode and a second electrode, and
a voltage supplied to the first electrode of the first LED chip is different from a voltage supplied to the first electrode of the second LED chip.

7. The display device according to claim 6 , wherein
the one of the plurality of sub-pixels has a first capacitance and a second capacitance,
a first electrode of the first capacitance is connected to the first electrode of the first LED chip,
a first electrode of the second capacitance is connected to the first electrode of the second LED chip,
the second electrode of the first LED chip is connected to the second electrode of the second LED chip, and
a voltage supplied to the second electrode of the first LED chip is same as a voltage supplied to the second electrode of the second LED chip.

Assignees

• Japan Display Inc

Inventors

• Ikeda Masanobu

Classifications

• H10W90/00

  Package configurations · CPC title

• H10H20/857

  Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

• H10H20/819

  characterised by their shape, e.g. curved or truncated substrates · CPC title

• G09G2320/0242

  Compensation of deficiencies in the appearance of colours · CPC title

• G09G2320/045

  Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title