Information processing system and method for controlling information processing system

Patent metadata

Field	Value
Publication number	US-11327764-B2
Application number	US-201916664982-A
Country	US
Kind code	B2
Filing date	Oct 28, 2019
Priority date	Nov 22, 2018
Publication date	May 10, 2022
Grant date	May 10, 2022

Abstract

A method for controlling an information processing system, the information processing system including multiple information processing devices coupled to each other, each of the multiple information processing devices including multiple main operation devices and multiple aggregate operation devices that are coupled to each other, the method includes: acquiring, by each of the aggregate operation devices, array data items from a main operation device coupled to the concerned aggregate operation device; determining the order of dimensions in which a process is executed and in which the information processing devices are coupled to each other; executing for each of the dimensions in accordance with the order of the dimensions, a process of halving the array data items and distributing the array data items to information processing devices arranged in the dimension; executing a process of transmitting, to information processing devices arranged in the dimension, operation results calculated based on data items.

First claim

What is claimed is:

1. An information processing system of a multi-dimensional torus structure having N dimensions (“N” is a natural number greater than two), the system comprising:
a plurality of information processing devices each of which is coupled to each other as any one of nodes in the multi-dimensional torus structure, each of the plurality of information processing devices including: a plurality of main operation devices and a plurality of aggregate operation devices, each of the plurality of main operation devices being coupled to each other via the plurality of aggregate operation devices,
each of the plurality of aggregate operation devices includes a memory and a processor coupled to the memory, the processor being configured to perform processing, the processing including:
performing a reduce processing by acquiring first array data items from each of the plurality of main operation devices included in the information processing device to which that aggregate operation device belongs, a size of each first array data item being equal to a value obtained by dividing an original size of array data stored in each of the plurality of main operation devices by a number of the N dimensions;
performing a halving processing for each of the N dimensions in a given order of dimension, the halving processing performed for i-th dimension (“i” is a natural number from 1 to N) among the N dimensions includes transmitting a second array data item to another information processing device arranged in the i-th dimension among the plurality of information processing devices, a size of the second array data item for the i-th dimension being equal to a value obtained by dividing the size of the first array data item by N{circumflex over ( )}i (“N{circumflex over ( )}i” is a value obtained by raising N to the power of i);
in response to completion of the halving processing for all of the N dimensions, performing a doubling processing for each of the N dimensions in the opposite order to the given order of dimension, the doubling processing performed for i-th dimension among the N dimensions includes transmitting a third array data item to the other information processing device arranged in the i-th dimension among the plurality of information processing devices, a size of the third array data item for the i-th dimension being equal to a value obtained by dividing the size of the first array data item by N{circumflex over ( )}(N−i) (“N{circumflex over ( )}(N−i)” is a value obtained by raising N to the power of N−i); and
in response to completion of the doubling processing for all of the N dimensions, transmitting operation results collected by the doubling processing for all of the N dimensions to each of the plurality of main operation devices included in the information processing device to which that device coupled to the concerned aggregate operation device.

2. The information processing system according to claim 1 , wherein the reduce processing performed by each of the plurality of aggregate operation device is configured to acquire the array data items, which have been obtained by dividing a data block stored in any one of the plurality of main operation devices coupled to that aggregate operation device so that the number of array data items is equal to the number of aggregate operation devices coupled to that main operation device.

3. The information processing system according to claim 2 , wherein
each of the plurality of main operation devices includes a memory and a processor coupled to the memory, the processor being configured to perform processing, the processing including:
dividing a data block stored in that main operation device into array data items for a number of aggregate operation devices coupled to that main operation device,
transmitting the array data items generated by the dividing of the data block to the aggregate operation devices coupled to that main operation device, and
receiving operation results from the aggregate operation devices coupled to that main operation device.

4. The information processing system according to claim 1 , wherein the information processing devices have a three-dimensional torus structure in which the plurality of main operation devices are coupled to each other, and have a one-dimensional torus structure in which the plurality of aggregate operation devices are coupled to each other.

5. The information processing system according to claim 1 , wherein the processing further includes determining the given order of the dimensions by sorting the dimensions in descending order of bandwidth in the dimensions.

6. The information processing system according to claim 1 , wherein the plurality of main operation devices included in a specific information processing device are coupled to all the plurality of aggregate operation devices included in the specific information processing device.

7. The information processing system according to claim 1 , wherein the torus structure is a four-dimensional torus structure.

8. A method of controlling an information processing system of a multi-dimensional torus structure having N dimensions (“N” is a natural number greater than two), the system, the information processing system including a plurality of information processing devices each of which is coupled to each other as any one of nodes in the multi-dimensional torus structure, each of the plurality of information processing devices including: a plurality of main operation devices and a plurality of aggregate operation devices, each of the plurality of main operation devices being coupled to each other via the plurality of aggregate operation devices, the method comprising:
acquiring, by each of the plurality of aggregate operation devices, array data items from each of the plurality of main operation devices included in the information processing device to which that aggregate operation device belongs, a size of each first array data item being equal to a value obtained by dividing an original size of array data stored in each of the plurality of main operation devices by a number of the N dimensions;
performing, by each of the plurality of aggregate operation devices, a halving processing for each of the N dimensions in a given order of dimension, the halving processing performed for i-th dimension (“i” is a natural number from 1 to N) among the N dimensions includes transmitting a second array data item to another information processing device arranged in the i-th dimension among the plurality of information processing devices, a size of the second array data item for the i-th dimension being equal to a value obtained by dividing the size of the first array data item by N{circumflex over ( )}i (“N{circumflex over ( )}i” is a value obtained by raising N to the power of i);
in response to completion of the halving processing for all of the N dimensions, performing a doubling processing for each of the N dimensions in the opposite order to the given order of dimension, the doubling processing performed for i-th dimension among the N dimensions includes transmitting a third array data item to the other information processing device arranged in the i-th dimension among the plurality of information processing devices, a size of the third array data item for the i-th dimension being equal to a value obtained by dividing the size of the first array data item by N{circumflex over ( )}(N−i) (“N{circumflex over ( )}(N−i)” is a value obtained by raising N to the power of N−i); and
in response to completion of the doubling processing for all of the N dimensions, transmitting, by each of plurality of the aggregate operation devices, operation results collected by doubling processing for all of the N dimensions to each of the plurality of ma

Assignees

• Fujitsu Ltd

Inventors

• Kasagi Akihiko
• Arakawa Takashi

Classifications

• G06F15/8023 Primary

  Two dimensional arrays, e.g. mesh, torus · CPC title

• G06F9/3836 Primary

  Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution · CPC title

• G06F9/345

  of multiple operands or results {(addressing multiple banks G06F12/06)} · CPC title

• G06F9/3889

  controlled by multiple instructions, e.g. MIMD, decoupled access or execute · CPC title